LV138
Abstract: SN54LV138 SN74LV138
Text: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS190D – FEBRUARY 1993 – REVISED JULY 1996 D D D D description These 3-line to 8-line decoders/demultiplexers are designed for 2.7-V to 5.5-V VCC operation. The ’LV138 are designed for high-performance
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SN54LV138,
SN74LV138
SCLS190D
LV138
SN54LV138
SN74LV138
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SN74LV138
Abstract: LV138 SN54LV138
Text: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS190D – FEBRUARY 1993 – REVISED JULY 1996 D D D D description These 3-line to 8-line decoders/demultiplexers are designed for 2.7-V to 5.5-V VCC operation. The ’LV138 are designed for high-performance
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SN54LV138,
SN74LV138
SCLS190D
LV138
SN74LV138
SN54LV138
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LV138
Abstract: SN54LV138 SN74LV138 SN74LV138D SN74LV138DBLE SN74LV138DR SN74LV138PWLE
Text: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS190D – FEBRUARY 1993 – REVISED JULY 1996 D D D D description These 3-line to 8-line decoders/demultiplexers are designed for 2.7-V to 5.5-V VCC operation. The ’LV138 are designed for high-performance
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SN54LV138,
SN74LV138
SCLS190D
LV138
SN54LV138
SN74LV138
SN74LV138D
SN74LV138DBLE
SN74LV138DR
SN74LV138PWLE
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LV138
Abstract: SN54LV138 SN74LV138 SN74LV138D SN74LV138DBLE SN74LV138DR SN74LV138PWLE
Text: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS190D – FEBRUARY 1993 – REVISED JULY 1996 D D D D description These 3-line to 8-line decoders/demultiplexers are designed for 2.7-V to 5.5-V VCC operation. The ’LV138 are designed for high-performance
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SN54LV138,
SN74LV138
SCLS190D
LV138
SN54LV138
SN74LV138
SN74LV138D
SN74LV138DBLE
SN74LV138DR
SN74LV138PWLE
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Untitled
Abstract: No abstract text available
Text: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS190D – FEBRUARY 1993 – REVISED JULY 1996 D D D D description These 3-line to 8-line decoders/demultiplexers are designed for 2.7-V to 5.5-V VCC operation. The ’LV138 are designed for high-performance
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SN54LV138,
SN74LV138
SCLS190D
LV138
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SN74ALVCH162245
Abstract: Schottky Barrier Diode Bus-Termination Array SN7400 CLOCKED SLLS210 SCAD001D TEXAS INSTRUMENTS SN7400 SERIES buffer SN74LVCC4245 sn74154 SDAD001C SN7497
Text: Section 4 Logic Selection Guide ABT – Advanced BiCMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 ABTE/ETL – Advanced BiCMOS Technology/ Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9
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SN74HC02 Spice model
Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
Text: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest
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Untitled
Abstract: No abstract text available
Text: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SC LS190P- FEBRUARY 19 9 3 - REVISED JULY 1996 EPIC Enhanced-Performance Implanted CMOS 2-fi Process Typical Vqlp (Output Ground Bounce) < 0.8 V at Vc c , Ta = 25°C SN54LV138. . . J OR W PACKAGE
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OCR Scan
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SN54LV138,
SN74LV138
LS190P-
SN54LV138.
SN74LV13S.
MIL-STD-883C,
JESD-17
300-mll
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