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    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394C MIL-STD-883, SN74LV132A, ////roarer/root/data13/imaging/BIT. /08032000/TXII/08022000/sn74lv132a SDYU001M, SCAU001A, SCEM128, PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394C MIL-STD-883, SN74LV132AD SN74LV132ADBR SN74LV132ADGVR SN74LV132ADR SN74LV132APWR SCEM128, PDF

    LV132A

    Abstract: SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394C MIL-STD-883, LV132A SN54LV132A SN74LV132A PDF