Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389B - SEPTEMBER 1997 - REVISED APRIL 1998 EPIC Enhanced-Performance implanted CMOS Process SN54LVOOA . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) Typical V q l p (Output Ground Bounce)
|
OCR Scan
|
PDF
|
SN54LV00A,
SN74LV00A
SCLS389B
JESD17
MIL-STD-883,
300-mil
SN54LVOOA
SN74LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389A - SEPTEMBER 1997 - REVISED OCTOBER 1997 EPIC rM Enhanced-Performance Implanted CMOS Process SN54LV00A. . X l OR & PACKAGE SN74LV00A . . . D, M , DGV, NS, OR PW PACKAGE Typical Vq lp (Output Ground Bounce)
|
OCR Scan
|
PDF
|
SN54LV00A,
SN74LV00A
SCLS389A
JESD17
MIL-STD-883,
300-mil
SN54LV00A.
SN74LV00A
|