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    Texas Instruments SN74LV00ADRG4

    QUADRUPLE 2-INPUT POSITIVE-NAND GATES
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    SN74LV00ADRG4 Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN74LV00ADRG4 Texas Instruments Logic - Gates and Inverters, Integrated Circuits (ICs), IC GATE NAND 4CH 2-INP 14-SOIC Original PDF
    SN74LV00ADRG4 Texas Instruments Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85 Original PDF
    SN74LV00ADRG4 Texas Instruments SN74LV00 - Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85 Original PDF

    SN74LV00ADRG4 Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J 000-V A114-A) A115-A) SN54LV00A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J 000-V A114-A) A115-A) SN54LV00A

    A115-A

    Abstract: C101 SN54LV00A SN74LV00A
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J A115-A C101 SN54LV00A SN74LV00A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J 000-V A114-A) A115-A) SN54LV00A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D Ioff Supports Partial-Power-Down Mode D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce SN54LV00A . . . J OR W PACKAGE


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J SN54LV00A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J 000-V A114-A) A115-A) SN54LV00A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J 000-V A114-A) A115-A) SN54LV00A

    lv00a

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J 000-V A114-A) A115-A) SN54LV00A lv00a

    A115-A

    Abstract: C101 SN54LV00A SN74LV00A
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J A115-A C101 SN54LV00A SN74LV00A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J 000-V A114-A) A115-A) SN54LV00A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J

    Untitled

    Abstract: No abstract text available
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J 000-V A114-A) A115-A) SN54LV00A

    A115-A

    Abstract: C101 SN54LV00A SN74LV00A lv00a
    Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV00A, SN74LV00A SCLS389J SN54LV00A A115-A C101 SN54LV00A SN74LV00A lv00a