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lattice maco

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Text: LatticeSC MACO Core LSCDR1X18 Low-Speed Clock and Data Recovery User’s Guide January 2008 Technical Note TN1122 Introduction The LatticeSC LSCDR low-speed clock and data recovery MACO™ core is a fully integrated low-power clock and data recovery (CDR) block designed for low-speed serial communication systems. The clock and data recovery circuit (CDR) is a digital base band circuit that post-processes a binary signal to produce an optimally sampled