UCN5881EP
Abstract: GP-025-1A
Text: 5881 5881 Data Sheet 26180.16 BiMOS II DUAL 8-BIT LATCHED DRIVER BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches two sets of eight , CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum
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UCN5881EP
GP-025-1A
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UCN5881EP
Abstract: No abstract text available
Text: 5881 Data Sheet 26180.16 5881 BiMOS II DUAL 8-BIT LATCHED DRIVER BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches two sets of eight , CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum
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UCN5881EP
MA-005-44A
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Untitled
Abstract: No abstract text available
Text: BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches two sets of eight , CMOS.sontrol circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum flexibility. The driver includes thermal shutdown circuitry to protect
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UCN5881EP
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Untitled
Abstract: No abstract text available
Text: BiMOS U DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches two sets of eight , CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum flexibility. The driver includes thermal shutdown circuitry to protect
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UCN5881EP
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UCN5881EP
Abstract: No abstract text available
Text: 5881 BiMOS U DXJAL 8-BIT LATCHED DRIVER WITH BEAD BACK With 16 CMOS data latches two sets of eight , CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum flexibility. The driver includes thermal shutdown circuitry to protect
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UCN5881EP
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Untitled
Abstract: No abstract text available
Text: 5881 BiMOS n DUAL 8-BIT LATCHED DRIVER W ITH BEAD BACK W ith 16 CM O S data latches two sets of eight , CM OS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-pow er interface w ith m aximum
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UCN5881EP
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UCN relay driver
Abstract: UCN-5881EP
Text: UCN-5881 EP BiMOS II DUAL 8-BIT LATCHED DRIVER UCN -5881EP BiMOS II DUAL 8-B IT LATCHED DRIVER With R e a d B a c k FEATURES • • • • • • q uire the use o f a p p r o p r i a t e pull u p res i s t o rs . W h e n read in g b a c k , the d a t a i n p u ts will sink 8 m A if its
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UCN-5881EP
UCN-5881
UCN relay driver
UCN-5881EP
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UCN5801EP
Abstract: UCN-5881EP 14-A14 UCN5881EP
Text: S m art P ower IC D rivers BiMOS LATCHED DRIVERS UCN-5800L and UCN-5801EP • • • • UCN-5815EP 500 mA, 50 V Outputs Output Transient Protection 4.4 MHz Minimum Data Input Rate Internal Input Pull-Down Resistors LU CG O cc l/î UCN-5815EP LU _l CD < Z
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UCN-5800L
UCN-5801EP
UCN-5815EP
UCN-5881EP
UCN-5800L
UCN-5881
UCN5801EP
UCN-5881EP
14-A14
UCN5881EP
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