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    ULTRA37128 Search Results

    ULTRA37128 Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    Ultra37128 Cypress Semiconductor An Introduction to In-System Reprogramming (ISR) with the Ultra37000 Original PDF
    Ultra37128 Cypress Semiconductor UltraLogic 128-Macrocell ISR CPLD Scan PDF
    Ultra37128V Cypress Semiconductor UltraLogic High-Performance CPLDs Original PDF
    Ultra37128V Cypress Semiconductor An Introduction to In-System Reprogramming (ISR) with the Ultra37000 Original PDF
    Ultra37128V Cypress Semiconductor UltraLogic 3.3V 128-Macrocell ISR CPLD Scan PDF

    ULTRA37128 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Ultra37128

    Abstract: 37128VP100
    Text: fax id: 6147 PRELIMINARY Ultra37128V UltraLogic 3.3V 128-Macrocell ISR™ CPLD Features • High speed — fMAX = 125 MHz • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — tPD = 10 ns


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    PDF Ultra37128V 128-Macrocell Ultra37128 37128VP100

    CY3600

    Abstract: 37128VP100
    Text: fax id: 6147 1Ult ra371 28 V PRELIMINARY Ultra37128V UltraLogic 3.3V 128-Macrocell ISR™ CPLD Features • High speed — fMAX = 125 MHz • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable ISR™ — JTAG compliant on board programming


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    PDF ra371 Ultra37128V 128-Macrocell CY3600 37128VP100

    CY37128P84-125JI

    Abstract: Ultra37000TM CY3600 37128P100
    Text: fax id: 6146 1Ult ra371 28 PRELIMINARY Ultra37128 UltraLogic 128-Macrocell ISR™ CPLD Features • High speed — fMAX = 167 MHz • 128 macrocells in eight logic blocks • In-System Reprogrammable ISR™ — JTAG compliant on board programming — tPD = 6.5 ns


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    PDF ra371 Ultra37128 128-Macrocell 84-pin 100-pin 160-pin FLASH374i/5i CY37128P84-125JI Ultra37000TM CY3600 37128P100

    FLASH370I

    Abstract: Ultra37032 FLASH370 UltraISRPCCABLE
    Text: fax id: 6451 An Introduction to In-System Reprogramming ISR with the Ultra37000™ Introduction This application note provides an introduction to the Ultra37000™ family of In-System Reprogrammable (ISR™) CPLDs. The Ultra37000 ISR CPLD family upgrades the


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    PDF Ultra37000TM Ultra37000TM Ultra37000 FLASH370iTM FLASH370i, FLASH370I Ultra37032 FLASH370 UltraISRPCCABLE

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6150 PRELIMINARY Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD Features • • • • • • • • • • • 192 macrocells in twelve logic blocks • In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes


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    PDF Ultra37192 192-Macrocell IEEE1149 160-pin

    tlp 453

    Abstract: No abstract text available
    Text: fax id: 6151 PRELIMINARY Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 10 ns Features — tS = 5.5 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant


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    PDF Ultra37192V 192-Macrocell IEEE1149 tlp 453

    CY37256VP160-100AC

    Abstract: h jtag
    Text: fax id: 6149 PRELIMINARY Ultra37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 10 ns Features — tS = 5.5 ns • 256 macrocells in sixteen logic blocks • IEEE standard 3.3V operation — 3.3V ISR — tCO = 6.5 ns Product-term clocking IEEE1149.1 JTAG boundary scan


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    PDF Ultra37256V 256-Macrocell IEEE1149 160-pin 208-pin 256-lead Ultra37192V Ultra37128V CY37256VP160-100AC h jtag

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6146 s? CYPRESS Ultra37128 PRELIMINARY UltraLogic 128-Macrocell ISR™ CPLD • High speed Features — f MAX = 167 MHz • 128 macrocells in eight logic blocks • In-System Reprogram mable ISR™ — t PD = 6.5 ns — ts = 3.5 ns — JTAG compliant on board programming


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    PDF Ultra37128 128-Macrocell 84-pin 100-pin 160-pin FLASH374i/5i

    Untitled

    Abstract: No abstract text available
    Text: PREUM INAm Ultra37128V UltraLogic 3.3V 128-Macrocell ISR™CLPD — tPD = 10 ns Features — ts = 5.5 ns • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.5 ns — JTAG-compliant on-board programming — Design changes don’t cause pinout changes


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    PDF Ultra37128V 128-Macrocell IEEE1149

    Untitled

    Abstract: No abstract text available
    Text: . „ n « PRELIMINARY Ultra37128 UltraLogic 128-Macrocell ISR™ CPLD — tco = 4.5 ns Features • 128 macrocells in eight logic blocks • In-System Reprogram mable ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes


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    PDF Ultra37128 128-Macrocell IEEE1149

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6146 s? CYPRESS Ultra37128 PRELIMINARY UltraLogic 128-Macrocell ISR™ CPLD • High speed Features — f MAX = 167 MHz • 128 macrocells in eight logic blocks • In-System Reprogram mable ISR™ — t PD = 6.5 ns — ts = 3.5 ns — JTAG compliant on board programming


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    PDF Ultra37128 128-Macrocell 84-pin 100-pin 160-pin FLASH374i/5i

    Untitled

    Abstract: No abstract text available
    Text: . „ n « Ultra37128V PRELIMINARY UltraLogic 3.3V 128-Macrocell ISR™CLPD — tPD = 10 ns Features — ts = 5.5 ns • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.5 ns • • • • • • — JTAG-compliant on-board programming


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    PDF Ultra37128V 128-Macrocell Ultra37128, Itra37064/37064V, Itra37192/37192V, Ultra37256/37256Vi

    CY37128P160-125AC

    Abstract: cpld internal CY3600 CY37128P100-167AC Ultra37128 CY37128P84-125JI
    Text: fax id: 6146 : : M : : IP *: ; M : : Ultra37128 .PRELIMINARY W CYPRESS UltraLogic 128-Macrocell ISR™ CPLD Features High speed f|\/lAX = 167 M Hz • 128 m a cro c ells in eig h t logic blocks — t PD = 6.5 ns • In-S ystem R e p ro g ra m m ab le IS R ™


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    PDF Ultra37128 128-Macrocell CY37128P160-125AC cpld internal CY3600 CY37128P100-167AC Ultra37128 CY37128P84-125JI

    CY3600

    Abstract: tI11J CY37128P84-125JI
    Text: fax id: 6146 ÆÊ PRELIMINARY F T V f S T “ ¡T * &*• risaliiJF ;UI Flmßbö Ultra37128 U ltraLogic 128-Macrocell IS R ™ CPLD H ig h s p e e d Features — • 128 m a c ro c e lls in e ig h t lo g ic b lo c k s f MAX = 167 M H z — t PD = 6.5 ns


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    PDF Ultra37128 128-Macrocell CY3600 tI11J CY37128P84-125JI

    lem la 100-P

    Abstract: E1101
    Text: Ultra37128 P R E U M IN A m UltraLogic 128-Macrocell ISR™ CPLD Features — t co = 4.5 ns P ro d uct-term clo ckin g • 128 m a cro c ells in eig h t logic blocks IEEE1149.1 JTAG b o u n d a ry scan • In-S ystem R e p ro g ra m m ab le IS R ™


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    PDF Ultra37128 128-Macrocell IEEE1149 lem la 100-P E1101

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6147 W CYPRESS PRELIMINARY Ultra37128V UltraLogic 3.3V 128-Macrocell ISR™ CPLD Features • High speed — f MAX = 1 2 5 M H z • 128 macrocells in eight logic blocks • 3.3V In-System Reprogram mable ISR™ — t PD = 10 ns — ts = 5.5 ns


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    PDF Ultra37128V 128-Macrocell

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6147 W CYPRESS PRELIMINARY Ultra37128V UltraLogic 3.3V 128-Macrocell ISR™ CPLD Features • High speed — f MAX = 1 2 5 M H z • 128 macrocells in eight logic blocks • 3.3V In-System Reprogram mable ISR™ — t PD = 10 ns — ts = 5.5 ns


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    PDF Ultra37128V 128-Macrocell

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6147 CYPRESS PRELIMINARY Ultra37128V UltraLogic 3.3V 128-Macrocell ISR™ CPLD • High speed Features - f MAX = 125 MHz • 128 macrocells in eight logic blocks • 3.3V In-System Reprogram mable ISR™ — t PD = 10 ns — ts = 5.5 ns — JTAG-compliant on-board programming


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    PDF Ultra37128V 128-Macrocell

    Untitled

    Abstract: No abstract text available
    Text: Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD Features — tpD = 12 ns — ts = 7 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 6 .5 ns • Product-term clocking — 3.3V ISR • IEEE1149.1 JTAG boundary scan


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    PDF Ultra37192V 192-Macrocell IEEE1149 16ctor

    Untitled

    Abstract: No abstract text available
    Text: . „ n « PRELIMINARY Ultra37064 UltraLogic 64-Macrocell ISR™ CPLD — ts = 3.5 ns Features — tco = 4.5 ns • 64 macrocells in four logic blocks • In-System Reprogrammable™ ISR™ • • • • • • • — JTAG-compliant on-board programming


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    PDF Ultra37064 64-Macrocell IEEE1149

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6150 CYPRESS PRELIMINARY Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD Product-term clocking IEEE1149.1 JTAG boundary scan Programmable slew rate control on individual l/Os Low power option on individual logic block basis 5V and 3.3V I/O capability


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    PDF Ultra37192 192-Macrocell IEEE1149 160-pin Ultra37256 Ultra37128

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6146 . a É | % m n r n n PRELIMINARY U ltra 3 7 1 2 8 UltraLogic 128-Macrocell ISR™ CPLD • High speed Features ^MAX = 167 MHz • 128 macrocells in eight logic blocks • In-System Reprogram mable ISR™ — t PD = 6.5 ns — ts = 3.5 ns


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    PDF 128-Macrocell 84-pin 100-pin 160-pin

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6149 CYPRESS UltraLogic 3.3V 256-Macrocell ISR™ CPLD PRELIMINARY Ultra37256V — t PD = 12 ns Features — ts = 6 ns • 256 macrocells in sixteen logic blocks • IEEE standard 3.3V operation — tco = 7 ns — 3.3V ISR — 5V tolerant • 3.3V In-System Reprogram mable ISR™


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    PDF 256-Macrocell Ultra37256V IEEE1149

    Untitled

    Abstract: No abstract text available
    Text: CYPRESS PRELIMINARY Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD — tco = 4.5 ns Features Product-term clocking IEEE1149.1 JTAG boundary scan Programmable slew rate control on individual l/Os Low power option on individual logic block basis 5V and 3.3V I/O capability


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    PDF Ultra37192 192-Macrocell IEEE1149 160-pin Ultra37192V, Ultra37128/37128V, Ultra37256/37256V, CY7C375i