Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    VSC9670 Search Results

    VSC9670 Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    VSC9670 Vitesse Semiconductor Framer, T1|J1 Standard Format, 456-EPBGA Original PDF
    VSC9670 Vitesse Semiconductor 28 T1 framing device. 3.3V CMOS with 5V tolerant I/O Original PDF

    VSC9670 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    TR-303

    Abstract: 43801 TR-62411 TR-43801 TR62411 VSC9670 VSC9680 TR303 TR 303
    Text: 28 T1 Framing Device VSC9670 Product Brief TimeStream Product Family VSC9670 Block Diagram Features: • Integrates 28 independent T1 Framers in a single device Clock/Data • Supports SF, ESF, pass-through and Japanese J1 formats RX/TX Errors/ Counts • Encodes and decodes AMI and


    Original
    PDF VSC9670 VSC9670 TR-303 43801 TR-62411 TR-43801 TR62411 VSC9680 TR303 TR 303

    AF23

    Abstract: TR-303 VSC9670 VSC9680 TR-43801 0x860 djb1544
    Text: VSC9670 Scalable Architecture Framing Engine for T1 Data Book Revision 4.0 VITESSE SEMICONDUCTOR CORPORATION VSC9670 Scalable Architecture Framing Engine for T1 Overview Features The Scalable Architecture Framing Engine forT1, the VSC9670, provides • A variety of loopbacks to DS1 or DS0


    Original
    PDF VSC9670 VSC9670, G56049-0 VSC9670 456-Pin AF23 TR-303 VSC9680 TR-43801 0x860 djb1544

    Vitesse BGA 672

    Abstract: AD42
    Text: VSC9680 Packet and Framing Engine Data Book Revision 4.0 VITESSE SEMICONDUCTOR CORPORATION VSC9680 Packet and Framing Engine Overview Features The VSC9680 Packet and Cell Engine is a highly channelized, highly • Multi-channel Packet and Cell Engine with


    Original
    PDF VSC9680 VSC9680 SC9680providesseverallineinterfaceoptions Vitesse BGA 672 AD42

    563D

    Abstract: 1h31 56m1 VSC9675
    Text: 96& Scalable Architecture Framing Engine with M13 Data Book Revision 4.0 VITESSE SEMICONDUCTOR CORPORATION VSC9675 Scalable Architecture Framing Engine with M13 Overview Features 7 K H 9 6& LV DQ  FK DQ QHO 7- UDPHU ZLW K LQWHJUDWHG 0 WKDW SURYLGHV XS WR  FKDQQHOV RI '6


    Original
    PDF VSC9675 M13ICMD) VSC9675 563D 1h31 56m1

    ECTF

    Abstract: hdlc VSC9670 VSC9675 VSC9680 DMA engine
    Text: 2048 Channel HDLC/ATM Controller VSC9680 Product Brief TimeStream Product Family VSC9680 Block Diagram ZBT RAM Interface Features: Clock/Reset Control • 2048 full duplex HDLC channels • 3 full duplex DS3 or HSSI channels • 16 HDSL and 8 ADSL channels


    Original
    PDF VSC9680 VSC9680 VSC967x VSC9675 ECTF hdlc VSC9670 VSC9675 DMA engine