XRT71D04 Search Results

Contextual Info: áç XRT71D04 PRELIMINARY 4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER DECEMBER 2000 REV. P1.0.2 GENERAL DESCRIPTION The XRT71D04 is a four channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristic requirements specified in the ETSI TBR-24, Bellcore

Contextual Info: DATA SHEET Communications XRT71D04 DS3/E3 Jitter Attenuator Features • Supports DS3/E3/STS-1 rates • Each channel can operate at different data rates • Selectable buffer size 16- or 32-bit • Available in either a 64-pin (XRT71D03), or a 80-pin (XRT71D04) TQFP package

GR-253

Abstract: GR-253-CORE GR-499-CORE TBR24 XRT71D04 XRT71D04IV G-755 31314
Contextual Info: áç XRT71D04 4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER APRIL 2001 REV. 1.1.1 GENERAL DESCRIPTION The XRT71D04 is a four channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristic requirements specified in the ETSI TBR-24, Bellcore

Contextual Info: áç XRT71D04 PRELIMINARY 4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER SEPTEMBER 2000 REV. P1.0.1 GENERAL DESCRIPTION The XRT71D04 is a four channel, single chip Jitter Attenuator, that meets the Jitter requirements specified in the ETSI TBR-24, Bellcore GR-499 and GR-253

ANSI T1.105.03B 1997

Contextual Info: DATA SHEET Communications XRT71D03 DS3/E3 Jitter Attenuator Features • Supports DS3/E3/STS-1 rates • Each channel can operate at different data rates • Selectable buffer size 16- or 32-bit • Available in either a 64-pin (XRT71D03), or a 80-pin (XRT71D04) TQFP package

Contextual Info: DATA SHEET Communications DS3/E3 Jitter Attenuator XRT71D04 Four Channel DS3/E3/STS-1 Jitter Attenuator, STS-1 to DS3 Desynchronizer Features • Supports DS3/E3/STS-1 rates • Each channel can operate at different data rates • Selectable buffer size 16- or 32-bit

resistor 100 Ohm

Contextual Info: áç XRT71D04 4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER APRIL 2001 REV. 1.1.0 GENERAL DESCRIPTION The XRT71D04 is a four channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristic requirements specified in the ETSI TBR-24, Bellcore

Contextual Info: áç XRT71D03 PRELIMINARY 3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER DECEMBER 2000 REV. P1.0.2 GENERAL DESCRIPTION The XRT71D03 is a three channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristics requirements specified in the ETSI TBR-24,

EXAR XR2209

Abstract: XR16C2850 XR68C681 XR88C192 ST16C650A
Contextual Info: ABOUT EXAR I PRODUCTS I INDEX I SALES INFO I INFORMATION REQUEST I SEARCH I HELP I Exar Products Alphanumeric Index To access product information and data sheets, click on the part number below. ST16C1450 ST16C1451 ST16C1550 ST16C1551 ST16C2450 ST16C2550 ST16C2552

XR2206 application notes

Abstract: pin diagram of ic xr2206 IC XR2206 XR2206 XR2206 pin details for function generator XR2206 monolithic function generator xr2206 circuit peb1756ae fsk modulation and demodulation using Xr2206 MXP2
Contextual Info: Communications OTN Multi-Service OTN Muxponder/Mapper Ethernet Transport Ethernet over PDH Ethernet over SONET/SDH PDH over SONET/SDH Port Expanders SONET/SDH Multi-Ch/Multi-Rate Framer+Serdes Mappers + Framers Transceivers/CDR PDH E1 LIUs T1/E1/J1 LIUs BITS Solutions

GR-253

Abstract: TBR24 XRT71D03 XRT71D04
Contextual Info: áç XRT71D03 3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER APRIL 2001 REV. 1.1.1 GENERAL DESCRIPTION The XRT71D03 is a three channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristics requirements specified in the ETSI TBR-24,

GR-499-CORE

Abstract: XRT71D04 XRT72L58 XRT73L04A XRT73LC04A XRT73LC04AIV XRT74L74
Contextual Info: áç XRT73LC04A PRELIMINARY 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT SEPTEMBER 2002 REV. P1.0.1 GENERAL DESCRIPTION The XRT73LC04A, 4-Channel, DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L04A and consists of four independent line

Contextual Info: DATA SHEET Communications DS3/E3 Jitter Attenuator XRT71D03 Three Channel DS3/E3/STS-1 Jitter Attenuator, STS-1 to DS3 Desynchronizer Features • Supports DS3/E3/STS-1 rates • Each channel can operate at different data rates • Selectable buffer size 16- or 32-bit

GR-253-CORE

Abstract: GR-499-CORE XRT71D04 XRT72L58 XRT73L04A XRT73LC04A XRT73LC04AIV XRT74L74
Contextual Info: XRT73LC04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT SEPTEMBER 2008 REV. 1.0.2 GENERAL DESCRIPTION The XRT73LC04A, 4-Channel, DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L04A and consists of four independent line transmitters and receivers integrated on a single chip

Contextual Info: I ABOUT EXAR I PRODUCTS I INDEX I SALES INFORMATION I INFORMATION REQUEST I SEARCH I HELP I DS3/E3 Product Selector Guide DS3/E3 Products DS3/E3 Line Interfaces Part No. #of Channels Data Rates Clock Recovery Temp Range Operating Power Supply Max Current Package s

Contextual Info: DATA SHEET Communications XRT75L00 Single-Chip Line Interface Unit LIU With Jitter Attenuator (JA) for DS3/E3 Environments Features: Receiver: • On-Chip Clock and Data Recovery Circuit for High-Input Jitter Tolerance • On-Chip B3ZS/HDB3 Encoder/Decoder Can be Disabled or Enabled

Contextual Info: áç XRT71D03 3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER APRIL 2001 REV. 1.1.0 GENERAL DESCRIPTION The XRT71D03 is a three channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristics requirements specified in the ETSI TBR-24,

GR-253-CORE

Abstract: GR-499-CORE XRT71D04 XRT72L58 XRT73L04 XRT73L04IV T73L04
Contextual Info: áç XRT73L04 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT NOVEMBER 2001 REV. 1.3.0 GENERAL DESCRIPTION The XRT73L04, 4-Channel, DS3/E3/STS-1 Line Interface Unit consists of four independent line transmitters and receivers integrated on a single chip designed for DS3, E3 or SONET STS-1 applications.

GR-253-CORE

Abstract: GR-499-CORE XRT71D04 XRT72L58 XRT73L04 XRT73L04A XRT73L04AIV
Contextual Info: áç XRT73L04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT DECEMBER 2001 REV. 2.0.0 GENERAL DESCRIPTION The XRT73L04A, 4-Channel, DS3/E3/STS-1 Line Interface Unit is an improved version of the XRT73L04 and consists of four independent line transmitters and

6 PORT LIU

Abstract: XRT75VL00 QUICC Engine MC68360 XRT7300 XRT73L00A XRT73L02M XRT73L03A XRT73L03B XRT73L04A
Contextual Info: TAN-025 Interfacing the Microprocessor Serial Interface of the XRT730X/XRT75L0X Family of DS3/E3/STS-1 LIU Devices to the SPI Port of the MC68360 QUICC Device Rev 1.3 July 16, 2004 Interfacing the Microprocessor Serial Interface of the XRT730X/XRT750X Family of DS3/E3/STS-1 LIU Devices to the SPI

GR-253

Abstract: TBR24 XRT71D03 XRT71D03IV XRT71D04 IC 2576 5.0v
Contextual Info: áç XRT71D03 3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER SEPTEMBER 2001 REV. 1.1.2 GENERAL DESCRIPTION The XRT71D03 is a three channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristics requirements specified in the ETSI TBR-24,

xr82c684

Abstract: XRT75L00D XR16C2850 XR16L2750 XR68C681 XR88C192 ST16C650A
Contextual Info: ABOUT EXAR I PRODUCTS I INDEX I SALES INFO I INFORMATION REQUEST I SEARCH I HELP I Exar Products Alphanumeric Index To access product information and data sheets, click on the part number below. ST16C1450 ST16C1451 ST16C1550 ST16C1551 ST16C2450 ST16C2550 ST16C2552

Contextual Info: XRT73LC04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT JULY 2003 REV. 1.0.0 GENERAL DESCRIPTION The XRT73LC04A, 4-Channel, DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L04A and consists of four independent line transmitters and receivers integrated on a single chip

dmo 465

Abstract: dmo 365 r 74hct00 NAIS 210 RELAY 0X13 DS3-M13 XRT72L54 relay NAIS 5v 5 pin BIP 109 intel 4702
Contextual Info: áç XRT72L54 PRELIMINARY FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The XRT72L54, 4 Channel DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bitfields within an “outbound” DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an “inbound” DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the “User Data”.