HV9708
Abstract: A020209
Text: HV9708 Die Specification Pad Layout 12 14 13 16 17 18 19 20 21 22 23 11 24 10 25 9 26 8 27 7 28 6 29 5 30 4 31 3 32 2 0,0 15 42 41 40 39 1 38 37 36 35 33 34 Die Specifications Die Dimensions Device Length Width Thickness mils Back Side Metal 113 97 20 ± 1.0
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HV9708
HV9708
A020209
A020209
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PDF
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SIVP
Abstract: No abstract text available
Text: VP0109 P-Channel Enhancement-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► The Supertex VP0109 is an enhancement-mode normallyoff transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing
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VP0109
DSFP-VP0109
A020209
SIVP
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PDF
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sivn
Abstract: VN0550 VN0550N3-G 125OC
Text: VN0550 N-Channel Enhancement-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► The Supertex VN0550 is an enhancement-mode normallyoff transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing
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VN0550
VN0550
DSFP-VN0550
A020209
sivn
VN0550N3-G
125OC
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PDF
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sivn fet
Abstract: sivn
Text: VN1206 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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VN1206
DSFP-VN1206
A020209
sivn fet
sivn
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PDF
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Untitled
Abstract: No abstract text available
Text: HV7022 Die Specification Pad Layout 12 0,0 13 14 15 16 17 18 19 20 21 22 23 11 24 10 25 9 26 8 27 7 28 6 29 5 30 4 31 3 32 2 33 1 34 43 42 41 40 39 38 37 36 35 Die Specifications Die Dimensions Device Length Width Thickness mils Back Side Metal 185 155
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HV7022
HV7022
HV7022C
A020209
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PDF
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HV9808
Abstract: No abstract text available
Text: HV9808 Die Specification Pad Layout 12 14 13 16 17 18 19 20 21 22 23 11 24 10 25 9 26 8 27 7 28 6 29 5 30 4 31 3 32 2 0,0 15 42 41 40 39 1 38 37 36 35 33 34 Die Specifications Die Dimensions Device Length Width Thickness mils Back Side Metal 113 97 20 ± 1.0
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HV9808
HV9808
A020209
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PDF
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HV57908
Abstract: No abstract text available
Text: HV57908 Die Specification Pad Layout 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 0,0 23 42 22 43 21 44 20 45 19 46 18 47 17 48 16 49 15 50 14 51 13 52 12 53 11 54 10 55 9 56 8 57 7 58 6 59 5 60 4 61 3 62 2 63 1 64 65 80 79 78 77 76 75 74 73 72
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HV57908
HV57908
A020209
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PDF
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HV7620
Abstract: No abstract text available
Text: HV7620 Die Specification Pad Layout 22 0,0 23 25 24 21 26 20 27 19 28 18 29 17 30 16 31 15 32 14 33 13 34 12 35 11 36 10 37 9 38 8 39 7 40 6 41 5 42 4 3 2 43 44 45 1 46 64/63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 Die Specifications Die Dimensions
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HV7620
HV7620
408-222-88plications,
A020209
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PDF
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sivn
Abstract: No abstract text available
Text: VN3515 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities
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VN3515
DSFP-VN3515
A020209
sivn
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PDF
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sivp VP0104
Abstract: SIVP vp0104
Text: VP0104 P-Channel Enhancement-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► The Supertex VP0104 is an enhancement-mode normallyoff transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing
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Original
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VP0104
DSFP-VP0104
A020209
sivp VP0104
SIVP
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PDF
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sivn
Abstract: No abstract text available
Text: VN0808 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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Original
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VN0808
DSFP-VN0808
A020209
sivn
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PDF
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sivn
Abstract: sivn fet VN0104N3-G marking n3 VN0104 sivn transistor DSPD-3TO92N3
Text: VN0104 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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Original
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VN0104
DSFP-VN0104
A020209
sivn
sivn fet
VN0104N3-G
marking n3
VN0104
sivn transistor
DSPD-3TO92N3
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PDF
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sivn
Abstract: sivn fet 125OC VN3515 3515L
Text: VN3515 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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Original
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VN3515
DSFP-VN3515
A020209
sivn
sivn fet
125OC
VN3515
3515L
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PDF
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sivn
Abstract: sivn fet vn0106 SIVN01 marking n3 VN0106N3-G
Text: VN0106 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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Original
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VN0106
DSFP-VN0106
A020209
sivn
sivn fet
vn0106
SIVN01
marking n3
VN0106N3-G
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PDF
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Untitled
Abstract: No abstract text available
Text: VN2410 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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Original
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VN2410
DSFP-VN2410
A020209
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PDF
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sivn
Abstract: No abstract text available
Text: VN0606 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination
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Original
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VN0606
DSFP-VN0606
A020209
sivn
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PDF
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