Untitled
Abstract: No abstract text available
Text: Three-phase monitoring relay for grid feeding CM-UFS.1, CM-UFS.13, CM-UFS.14 2CDC 251 014 F0t09 Data sheet Features ᕇ ᕃ ᕄ ᕅ ᕆ ᕈ CM-UFS.1, CM-UFS.1x R/T: yellow LED relay status, timing F1: red LED fault message F2: red LED fault message
|
Original
|
F0t09
0126-1-1/A1
|
PDF
|
XC95288
Abstract: PQ208 TQ144 XC9500XL XC95288XL 208pin footprint pqfp 208
Text: XC95288XL High Performance CPLD September 28, 1998 Version 1.0 Advance Product Specification Features Power Estimation • • • • Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output
|
Original
|
XC95288XL
XC9500XL
TQ144
144-Pin
PQ208
208-Pin
BG352
352-Pin
-40oC
XC95288XL
XC95288
208pin
footprint pqfp 208
|
PDF
|
1SNA607222R0700
Abstract: F0004 60810-1 1SVR405613R1100 1SVR405622R9000 1SVR405613R8200
Text: Interface relays and optocouplers Product group picture 5 5/1 ABB | Catalog Electronic Products and Relays 2013/2014 | 2CDC 110 004 C0209 Interface relays and optocouplers Table of contents Interface Relays and Optocouplers Pluggable interface relays 5/3 Table of contents
|
Original
|
C0209
1SNA233042R2600
1SNA233043R2700
1SNA233044R2000
1SNA230060R1500
1SNA232060R0300
1SNA233060R0400
1SNA400085R2700
1SNA400145R0700
1SNA400084R2600
1SNA607222R0700
F0004
60810-1
1SVR405613R1100
1SVR405622R9000
1SVR405613R8200
|
PDF
|
XC95288
Abstract: BG352 HQ208 XC9500 X5906 X7131 HQ208I
Text: 1 XC95288 In-System Programmable CPLD December 4, 1998 Version 3.0 1 1* Product Specification Features Power Management • • 15 ns pin-to-pin logic delays on all pins fCNT to 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 192 user I/O pins
|
Original
|
XC95288
36V18
HQ208
208-Pin
BG352
352-Pin
XC95288
XC9500
X5906
X7131
HQ208I
|
PDF
|
A23 780-4
Abstract: 471 E25 BG352 HQ208 XC9500 XC95288
Text: XC95288 In-System Programmable CPLD November 12, 1997 Version 2.0 3* Preliminary Product Specification Features MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f • • • • • Where: • • • • • • • • • • • MCHP = Macrocells in high-performance mode
|
Original
|
XC95288
arcAC25,
HQ208
208-Pin
BG352
352-Pin
XC95288
A23 780-4
471 E25
XC9500
|
PDF
|
TSX NANO CABLE
Abstract: TSX NANO PL7-07 SES N 2402 capteur LDR TSX 07 31 2428 TSX NANO CABLE TSX 07 TSX 07 31 1628 GMOV schneider pl7
Text: B12 Automatismes programmables industriels Automates TSX Nano Automates TSX Nano Introduction Le TSX Nano est un automate programmable au service des petits automatismes présent dans tous les secteurs d’activité. Ses caractéristiques principales sont la
|
Original
|
|
PDF
|
UPD 552 C
Abstract: LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210
Text: XC5200 Field Programmable Gate Arrays June 1, 1996 Version 4.0 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed
|
Original
|
XC5200
PQ100
VQ100
XC5202
XC5204
XC5206
XC5210
XC5215
TQ144
PG156
UPD 552 C
LC1 D12 P7
XC2000
XC3000
XC4000
XC5200
XC5202
XC5204
XC5206
XC5210
|
PDF
|
10HQ
Abstract: XC95288 471 E25 HQ208 XC9500
Text: XC95288 In-System Programmable CPLD September 15, 1999 Version 4.0 5* Product Specification Features Power Management • • 10 ns pin-to-pin logic delays on all pins fCNT to 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 192 user I/O pins
|
Original
|
XC95288
36V18
HQ208
208-Pin
BG352
352-Pin
XC95288
10HQ
471 E25
XC9500
|
PDF
|
AF125
Abstract: n345 pioneer amplifier an214 diode t25 4 d9 DIODE T25-4 AY102 AF155 AN214 amplifier horizontal driver transistor D155 IC AN214
Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)
|
Original
|
DS022-1
32/64-bit,
66-MHz
XCV1000E,
1600E,
2000E"
DS022-1,
DS022-2,
DS022-4
DS022-3,
AF125
n345
pioneer amplifier an214
diode t25 4 d9
DIODE T25-4
AY102
AF155
AN214 amplifier
horizontal driver transistor D155
IC AN214
|
PDF
|
XCV1000E
Abstract: XCV1600E XCV400E XCV600E XCV2000E XCV200E XCV300E XCV50E DS022-1 XCV100E
Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)
|
Original
|
DS022-1
32/64-bit,
66-MHz
XCV1000E,
1600E,
2000E"
DS022-1,
DS022-2,
DS022-4
DS022-3,
XCV1000E
XCV1600E
XCV400E
XCV600E
XCV2000E
XCV200E
XCV300E
XCV50E
DS022-1
XCV100E
|
PDF
|
QL5064
Abstract: AA23 PAR64 REQ64 verilog code for 64 bit barrel shifter 132x64 vhdl code for 8 bit barrel shifter BIST code "ESP"
Text: QL5064 - QuickPCI ESP 66 MHz/64-bit PCI Controller with Embedded Programmable Logic and Dual Port SRAM Preliminary Data – Revision 2.0 DEVICE HIGHLIGHTS Updated: 19-Jan-99 High Performance PCI Controller - 64-bit / 66 MHz Master/Target PCI Controller
|
Original
|
QL5064
Hz/64-bit
19-Jan-99
64-bit
ACK64N
PAR64
456-PIN
QL5064-66S
PB456C
AA23
PAR64
REQ64
verilog code for 64 bit barrel shifter
132x64
vhdl code for 8 bit barrel shifter
BIST code
"ESP"
|
PDF
|
ADSP-TS101S
Abstract: viterbi algorithm Viterbi Decoders TigerSHARC DSP Instruction set specification
Text: a '63 $'63766 3UHOLPLQDU\ 7HFKQLFDO 'DWD KEY FEATURES • • PR O G R A M S E Q UE NC E R PC B TB • DA TA A D DR E S S G E N E R A TIO N IR Q 32 IN TE G E R J A LU A DD R FE TC H IA B Multiprocessing capability provides highest bandwidth for interprocessor communication:
|
Original
|
44Gbytes/s
32-bit
32-bit
ADSP-TS101SKB1180X
ADSP-TS101SKB2180X
ADSP-TS101S
viterbi algorithm
Viterbi Decoders
TigerSHARC DSP Instruction set specification
|
PDF
|
XCV1600E
Abstract: DIODE T25-4 IC AN214 n345 pioneer amplifier an214 DS022-1 XCV1000E XCV100E XCV2000E XCV200E
Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)
|
Original
|
DS022-1
32/64-bit,
66-MHz
XCV300E
DS022-1,
DS022-2,
DS022-4
DS022-3,
DS022-4,
XCV1600E
DIODE T25-4
IC AN214
n345
pioneer amplifier an214
DS022-1
XCV1000E
XCV100E
XCV2000E
XCV200E
|
PDF
|
MARKING CODE p109
Abstract: 416L DD 127 D TRANSISTOR diode mark P019 IDS200 marking p020 p014 marking datasheet p022 P108 P183 kw
Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections • RapidConfigure parallel interface for fast, incremental
|
Original
|
|
PDF
|
|
|
vt8233a
Abstract: vt1631 VT8233 VT1621 CLE266 RX6C pro266t CLE266 cd PRO266 via apollo
Text: Data Sheet CLE266 Version CD/CE North Bridge Revision 2.06 December 1, 2004 VIA TECHNOLOGIES, INC. Copyright Notice: Copyright 2002-2004 VIA Technologies Incorporated. All Rights Reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language, in any form or by any means, electronic, mechanical, magnetic, optical,
|
Original
|
CLE266
27x27x2
MS-034
548-Pin
27x27mm
vt8233a
vt1631
VT8233
VT1621
CLE266
RX6C
pro266t
CLE266 cd
PRO266
via apollo
|
PDF
|
ARXD 149
Abstract: RDATA34 programming 29F400 C100 C101 C102 C103 C104 C105 C106
Text: A B C D E RST_control SERclk BYPASS QUICK SWITCH SysAD[0.63] SysADC[0.7] SysAD[0.63] SysADC[0.7] AD[0.63] ADP[0.7] BypsOe 4 AD[0.63] ADP[0.7] BypsOe 4 {Value} DEVICE BUFFER & LATCH {Value} {Value} DEVICE SERint FlashRST* RST_control {Value} CPU-RST-PAL
|
Original
|
EVB64120
74FCT163244
48-TSS0P
ARXD 149
RDATA34
programming 29F400
C100
C101
C102
C103
C104
C105
C106
|
PDF
|
AB P89 zener
Abstract: Zener diode MARKING P035 252 B34 ZENER DIODE Zener diode MARKING P044 ZENER diode p317 Zener Diode p047 p014 DD 127 D TRANSISTOR zener AF4 on semiconductor marking code P008
Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections • RapidConfigure parallel interface for fast, incremental
|
Original
|
|
PDF
|
PCT303D
Abstract: PCT303W FB901 PCT303 ZF MicroSystems 486 EA7 SMD MT48LC1M16A1TG fb120 EA6 SMD R4.7K
Text: B C VDD_CORE P14 FLASHCSX0 FLASHCSX1 MEMRX MEMWX SA[23.0] SD[15.0] FLASHCSX0 FLASHCSX1 IRQ7 IRQ[3.5] IRQ[9.12] MEMRX MEMWX SHD_DIS PCBEEP ZRSTX FLASHCSX0 FLASHCSX1 DRD[31.0] DRA[13.0] DRDQM[3.0] DRCLK0 DRCLK1 DRCLK2 DRCLK3 DRCSX0 DRCSX1 DRCSX2 DRCSX3
|
Original
|
MM74HCT74M
C220p
1206LED
MTH156
9400-0048-03-X4
PCT303D
PCT303W
FB901
PCT303
ZF MicroSystems 486
EA7 SMD
MT48LC1M16A1TG
fb120
EA6 SMD
R4.7K
|
PDF
|
MICROPROCESSOR Z80
Abstract: uPD72020 uPC5102 transistor 2p4m UPD6487 2SD1557 2SJ 3305 UPD77529 TRANSISTOR SOD MARKING CODE 352A micro servo 9g tower pro
Text: The export of these products from Japan is regulated by the Japanese government. The export of some or all of these products may be prohibited without governmental license. To export or re-export some or all of these products from a country other than Japan may also be prohibited without a license from that country. Please call
|
Original
|
Z80TM
V20TM,
V20HLTM,
V25TM,
V25HSTM,
V30TM,
V30HLTM,
V33TM,
V33ATM,
V35TM,
MICROPROCESSOR Z80
uPD72020
uPC5102
transistor 2p4m
UPD6487
2SD1557
2SJ 3305
UPD77529
TRANSISTOR SOD MARKING CODE 352A
micro servo 9g tower pro
|
PDF
|
74ALVT16652
Abstract: CYNCP80192 CYNSE70032 CYNSE70128
Text: CYNCP80192 1 CYNCP80192 Network Database Coprocessor Cypress Semiconductor Corporation Document #: 38-02043 Rev. * • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised January 16, 2002 CYNCP80192 CONTENTS 1.0 OVERVIEW . 5
|
Original
|
CYNCP80192
CYNCP80192
CYNCP80192-100
CYNCP80192-BGC)
74ALVT16652
CYNSE70032
CYNSE70128
|
PDF
|
ARXD 149
Abstract: PAD015 U2554 PAD130 PAD031 PAD115 C113 C114 C126 C127
Text: A B C D E RST_control SERclk BYPASS QUICK SWITCH SysAD[0.63] SysADC[0.7] SysAD[0.63] SysADC[0.7] AD[0.63] ADP[0.7] BypsOe 4 AD[0.63] ADP[0.7] BypsOe 4 {Value} DEVICE BUFFER & LATCH {Value} {Value} DEVICE SERint FlashRST* RST_control {Value} CPU-RST-PAL
|
Original
|
EVB64120
74FCT163244
48-TSS0P
ARXD 149
PAD015
U2554
PAD130
PAD031
PAD115
C113
C114
C126
C127
|
PDF
|
TMS320C56
Abstract: S-PQFP-G128
Text: Preliminary Data, SPRS029 TMS320C56/C57 Electrical Specifications This document contains the preliminary specifications for the TMS320C56 and TMS320C57 digital signal processors. It includes the following: Topic Page 2 1.1 Pin Assignments. 1.2
|
OCR Scan
|
SPRS029
TMS320C56/C57
TMS320C56
TMS320C57
TMS32QC57
11gure
100-Pin
PZ/S-PQFP-G100
O-136
S-PQFP-G128
|
PDF
|
I-CUBE
Abstract: lp-032 IQX160-7PQ208 P124l P2G5 P1291
Text: i: * I- C u b IQX Family Data Sheet e m F eatures D e s c r ip t io n • SRAM-based, in-system programmable The IQX family of SRAM-based bit-oriented switching devices is • Switch Matrix manufactured using a 0.6|jm C M O S process. These devices offer clock speeds of up to 133 MHz and pin-to-pin delay as low
|
OCR Scan
|
|
PDF
|
gc 7137 ad
Abstract: transistor c5200 c5200 transistor TTC 5200 C5200 LC1 D18 P7 HC 148 TRANSISTOR ATIC 164 D2 44 pin
Text: £ XILINX XC5200 Series Field Programmable Gate Arrays Novem ber 5, 1998 Version 5.2 Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogram m able architecture - 0.5|j.m three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)
|
OCR Scan
|
XC5200
distribution156
PQ160
TQ176
PG191
HQ208
PQ208
PG223
BG225
HQ240
gc 7137 ad
transistor c5200
c5200 transistor
TTC 5200
C5200
LC1 D18 P7
HC 148 TRANSISTOR
ATIC 164 D2 44 pin
|
PDF
|
