ALTERA 48 FPGA Search Results

ALTERA 48 FPGA Result Highlights (5)

Part	Manufacturer	Description
ADC1213D080WO-DB	Renesas Electronics Corporation	ADC1213D080WO demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through specific connectors
ADC1413D065WO-DB	Renesas Electronics Corporation	ADC1413D065W0 demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through specific connectors
ADC1443D200WO-DB	Renesas Electronics Corporation	ADC1443D200W0 demo board; compliant with Altera, Xilinx FPGA boards through specific connectors
ADC1443D125WO-DB	Renesas Electronics Corporation	ADC1443D125W0 demo board; compliant with Altera, Xilinx FPGA boards through specific connectors
ADC1453D250WO-DB	Renesas Electronics Corporation	ADC1453D250WO demo board; compliant with Altera, Xilinx FPGA boards through specific connectors

ALTERA 48 FPGA Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
format .pof Abstract: programmer EPLD Text: Passing Hierarchical Timing Constraints from Synopsys Tools to MAX+PLUS II Version 9.0 Technical Brief 48 August 1998, ver. 1 Introduction Synopsys 700 East Middlefield Road Mountain View, CA 94043 650 962-5000 http://www.synopsys.com The interface between the Altera¨ MAX+PLUS¨ II software and the Synopsys Design	Original		PDF
EP3SE110F1152 Abstract: f7807 EP3SE110-F1152 EP3SL110F780 107K hc335 WF484 EP3SE110F780 GEN-1002-00 EP3SL200-F1517 Text: HardCopy III ASIC Product Table v0.995 HardCopy Base Die HardCopy III ASIC Package Body Size 2 WF484 (23 mm) FF484 (23 mm) HC325 WF780 (29 mm) FF780 (29 mm) Generic Part Number HC325WF484N HC325FF484N HC325WF780N HC325FF780N Stratix III FPGA Prototype 107K	Original	18x18 EP3SE110--F7807 EP3SL200--H7807 EP3SL340--H11527 GEN-1002-00 EP3SE110F1152 f7807 EP3SE110-F1152 EP3SL110F780 107K hc335 WF484 EP3SE110F780 GEN-1002-00 EP3SL200-F1517	PDF
EP4SE820H40 Abstract: ep4se530h40 f7807 EP4SE820H35 EP4SE530H35 H1152 EP4SE230 EP4SE530 EP4SE230F29 stratix LF1152 Text: HardCopy IV E ASIC Product Table v0.121 HardCopy Base Die HardCopy IV E ASIC Stratix IV E FPGA Prototype HardCopy IV E Resource Stratix IV E FPGA Prototype Max Resource 1 Package2 (Body Size) Generic Part Number Prototyping Device LEs ASIC Gates3 I/O Pins4	Original	18x18 M144Ks WF484 FF484 HC4E25WF484N HC4E25FF484N EP4SE230F29 WF780 HC4E25WF780N EP4SE820H40 ep4se530h40 f7807 EP4SE820H35 EP4SE530H35 H1152 EP4SE230 EP4SE530 EP4SE230F29 stratix LF1152	PDF
Untitled Abstract: No abstract text available Text: 2013.10.17 AN-518 SGMII Interface Implementation Using Soft CDR Mode of Altera FPGAs Subscribe Send Feedback The Serial Gigabit Media Independent Interface SGMII protocol provides connectivity between the physical layer (PHY) and the Ethernet media controller (MAC). The SGMII solution for Altera FPGAs allows you	Original	AN-518	PDF
10K60 Abstract: 10K30 10k-60 ALTERA 10K70 FPGA 10K50 altera 48 fpga 10K40 ATC-ALTER-50 Text: ATC-ALTERA Industry Pack FPGA with 512 kB SRAM Industry Pack ALTERA 10K-70K SERIES FPGA w/ memory FEATURE SUMMARY ATC-ALTERA- XX Functional Block Diagram IP local bus Connector Control Logic • • • • • • • • • • • • ALTERA FPGA 512 kiloByte of external SRAM	Original	10K-70K ATC-ALTER-20 ATC-ALTER-30 ATC-ALTER-40 ATC-ALTER-50 ATC-ALTER-60 ATC-ALTER-70 10K20 10K30 10K40 10K60 10K30 10k-60 ALTERA 10K70 FPGA 10K50 altera 48 fpga 10K40 ATC-ALTER-50	PDF
5AGX Abstract: lpddr2 tutorial EP4CE22F17 solomon 16 pin lcd display 16x2 Altera MAX V CPLD DE2-70 vhdl code for dvb-t 2 fpga based 16 QAM Transmitter for wimax application with quartus altera de2 board sd card AL460A-7-PBF Text: Version 11.0 Altera Product Catalog Contents Glossary. 2 Stratix FPGA Series. 3 HardCopy® ASIC Series. 17 Arria® FPGA Series. 21	Original	SG-PRDCT-11 5AGX lpddr2 tutorial EP4CE22F17 solomon 16 pin lcd display 16x2 Altera MAX V CPLD DE2-70 vhdl code for dvb-t 2 fpga based 16 QAM Transmitter for wimax application with quartus altera de2 board sd card AL460A-7-PBF	PDF
v-by-one hs Abstract: camera-link to 3G-SDI converter Netlogic camera-link to HDMI converter camera-link to hd-SDI converter serdes hdmi optical fibre SFP CPRI EVALUATION BOARD AL460A verilog SATA HDMI verilog code Text: Version 8.0 Altera Product Catalog Contents Glossary. 2 Stratix FPGA series. .3 HardCopy® ASIC Series. 14 Arria® FPGA Series. 18	Original		PDF
DVB smart card rs232 iris Abstract: fpga based 16 QAM Transmitter for wimax application with quartus fpga based 16 QAM Transmitter for wimax application EP4SGX230F1517 vhdl code for lte turbo decoder sodimm ddr3 connector PCB footprint starfabric eQFP 144 footprint higig2 SFP altera Text: Version 7.2 Altera Product Catalog Contents Glossary. 2 Stratix FPGA series. .3 HardCopy® ASIC series. 11 Arria® FPGA series. 15	Original		PDF
EP4S Abstract: EP4S40G5H40 higig specification EP4SGX180 EP4SGX70 ep4sgx230f1517 TSMC 40nm interlaken higig fbga -1932 Text: 1. Overview for the Stratix IV Device Family February 2011 SIV51001-3.2 SIV51001-3.2 Altera Stratix® IV FPGAs deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. Stratix IV FPGAs are based on the Taiwan Semiconductor	Original	SIV51001-3 40-nm EP4S EP4S40G5H40 higig specification EP4SGX180 EP4SGX70 ep4sgx230f1517 TSMC 40nm interlaken higig fbga -1932	PDF
interlaken Abstract: Sarance Technologies Xlaui EP4S40G2 TCAM 2009 100g EP4S100G4 baser Text: Designing with 40-nm Stratix IV GT devices—only FPGAs with integrated 11.3-Gbps transceivers 40G/100G network applications From Internet protocol television IPTV to online videos and high-definition programming, bandwidth-heavy applications are continuing to flourish. To support these demands, build your aggregated carrier and transmission	Original	40-nm 40G/100G SS-01051-2 interlaken Sarance Technologies Xlaui EP4S40G2 TCAM 2009 100g EP4S100G4 baser	PDF
TSMC+memory+40nm Abstract: No abstract text available Text: Altera’s 40-nm FPGA transceivers: meeting system bandwidth, power, and BER requirements Highest system bandwidth and power efficiency Stratix IV GX and GT FPGAs offer a robust solution for high-speed serial connectivity. The integrated transceivers are	Original	40-nm 40-nm SS-01049-2 TSMC+memory+40nm	PDF
precision Abstract: No abstract text available Text: Enabling High-Performance, High-Precision Signal Processing 28-nm Variable-Precision DSP Block Architecture More than ever, digital signal processing DSP applications need high performance and high precision, in the greater than 18-bit range. That's why the DSP capabilities of FPGAs are ideal. In our	Original	28-nm 18-bit SS-01066-1 precision	PDF
fbga -1932 Abstract: fb h35 EP4SGX180 EP4SE820 EP4S100G5 Text: 1. Overview for the Stratix IV Device Family September 2012 SIV51001-3.4 SIV51001-3.4 Altera Stratix® IV FPGAs deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. Stratix IV FPGAs are based on the Taiwan Semiconductor	Original	SIV51001-3 40-nm fbga -1932 fb h35 EP4SGX180 EP4SE820 EP4S100G5	PDF
Untitled Abstract: No abstract text available Text: 1. Overview for the Stratix IV Device Family June 2011 SIV51001-3.3 SIV51001-3.3 Altera Stratix® IV FPGAs deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. Stratix IV FPGAs are based on the Taiwan Semiconductor	Original	SIV51001-3 40-nm	PDF

hc335 Abstract: EP3SE110F1152 EP3SE110 EP3SL110F780 1517-pin HC325WF484N hc335ff1152n HC335FF1517N Altera Stratix II BGA 484 pinout HC325 Text: 3. Mapping Stratix III Device Resources to HardCopy III Devices HIII53003-3.1 This chapter discusses the available options for mapping from a Stratix III device to a HardCopy ® III device. The Quartus II software limits resources to those available to both the Stratix III FPGA	Original	HIII53003-3 avai10, hc335 EP3SE110F1152 EP3SE110 EP3SL110F780 1517-pin HC325WF484N hc335ff1152n HC335FF1517N Altera Stratix II BGA 484 pinout HC325	PDF
EP4SE Abstract: FBGA 1760 EP4SGX ordering information 3G-SDI serializer CMOS applications handbook DDR SDRAM HY EP4SE230 EP4SE820 L1 F45 EP4SGX70 Text: 1. Stratix IV Device Family Overview SIV51001-3.1 Altera Stratix® IV FPGAs deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. Stratix IV FPGAs are based on the Taiwan Semiconductor	Original	SIV51001-3 40-nm EP4SE FBGA 1760 EP4SGX ordering information 3G-SDI serializer CMOS applications handbook DDR SDRAM HY EP4SE230 EP4SE820 L1 F45 EP4SGX70	PDF
1517-pin Abstract: EP4SE530 ep4se530h40 EP4SGX180 HC4GX15LAF780N EP4SE230 EP4SGX180FF35 HC4GX25 EP4SE820 HC4GX25LF1152 Text: 3. Mapping Stratix IV Device Resources to HardCopy IV Devices HIV52003-2.1 This chapter discusses the available options for mapping from a Stratix IV device to a HardCopy ® IV device. The Quartus II software limits resources to those available to both the Stratix IV FPGA	Original	HIV52003-2 1517-pin EP4SE530 ep4se530h40 EP4SGX180 HC4GX15LAF780N EP4SE230 EP4SGX180FF35 HC4GX25 EP4SE820 HC4GX25LF1152	PDF
SFP LVDS Abstract: SFP LVDS altera SFP altera sgmii sgmii mode sfp SFP sgmii altera circuit diagram of PPM transmitter and receiver 8B10B fpga ethernet sgmii AN-518-1 Text: SGMII Interface Implementation Using Soft-CDR Mode of Stratix III Devices Application Note 518 May 2008, version 1.0 Introduction Stratix III device family are one of the most architecturally advanced, high performance, and low power FPGAs available in the market place.	Original		PDF
GPON block diagram Abstract: TSMC 40nm 90 nm hspice CEI-6G-SR CPRI multi rate 10Gcapable 29K212 pcie X1 edge connector sata CIRCUIT diagram 40G-100G Text: Innovating With a Full Spectrum of 40-nm FPGAs and ASICs with Transceivers WP-01078-1.4 White Paper Increasing bandwidth requirements for broadband services are driving silicon vendors to use more and more high-speed serial transceivers. Therefore, nextgeneration applications feature a wide range of data rates, from a few Mbps to	Original	40-nm WP-01078-1 40-nm GPON block diagram TSMC 40nm 90 nm hspice CEI-6G-SR CPRI multi rate 10Gcapable 29K212 pcie X1 edge connector sata CIRCUIT diagram 40G-100G	PDF
Stratix PCI Abstract: higig specification TSMC 40nm SRAM EP4SE820 FBGA 1760 higig EP4SGX70 F1517 ep4se530h40 xaui xgmii ip core altera Text: 1. Stratix IV Device Family Overview SIV51001-3.0 Altera Stratix® IV FPGAs deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. Stratix IV FPGAs are based on the Taiwan Semiconductor	Original	SIV51001-3 40-nm 376res" Stratix PCI higig specification TSMC 40nm SRAM EP4SE820 FBGA 1760 higig EP4SGX70 F1517 ep4se530h40 xaui xgmii ip core altera	PDF
mx25l25635 Abstract: MX25L6445 mx25u6435 MX25L256 28F00AP30 MX25L25635E intel 28f00ap30 MX29GL256 MX25L25735 MX25L25735E Text: Parallel Flash Loader Megafunction User Guide Parallel Flash Loader Megafunction User Guide UG-01082-1.0 User Guide This user guide discusses the parallel flash loader PFL megafunction, and provides information about performing flash memory programming, configuring your FPGA	Original	UG-01082-1 AN386: mx25l25635 MX25L6445 mx25u6435 MX25L256 28F00AP30 MX25L25635E intel 28f00ap30 MX29GL256 MX25L25735 MX25L25735E	PDF
parametric equalizer ic Abstract: parametric equalizer verilog code for i2s bus graphic equalizer 12db verilog code for iir filter digital graphic equalizer ic 7 band equalizer Graphic Equalizer ic FAT32 TLV320DAC23 Text: Automotive Audio Reference Design Application Note 407 Version 1.0, April 2006 Introduction f The Altera Automotive Audio Reference Design demonstrates Altera Cyclone FPGAs in an audio processing role targeted at the automotive sector. The reference design runs on a Nios® development board,	Original		PDF
QSFP28 I2C Abstract: No abstract text available Text: Arria 10 Device Overview 2013.09.04 AIB-01023 Subscribe Feedback Altera’s Arria FPGAs and SoCs deliver optimal performance and power efficiency in the midrange. By using TSMC's 20-nm process technology on a high-performance architecture, Arria 10 FPGAs and SoCs	Original	AIB-01023 20-nm QSFP28 I2C	PDF
TSMC 40nm Abstract: EP4SE230 interlaken EP4SE360 EP4SE530 EP4SGX70 GPON SoC Text: think AND not OR Altera @ 40 nm What if you could design with the highest performance AND the lowest power? With the benefits of both FPGAs AND ASICs? With design software delivering the highest logic utilization AND the fastest compile times? You can, with	Original	40-nm GB-01007-1 TSMC 40nm EP4SE230 interlaken EP4SE360 EP4SE530 EP4SGX70 GPON SoC	PDF

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ALTERA 48 FPGA Search Results

ALTERA 48 FPGA Result Highlights (5)

ALTERA 48 FPGA Datasheets Context Search

format .pof

EP3SE110F1152

EP4SE820H40

Untitled

10K60

5AGX

v-by-one hs

DVB smart card rs232 iris

EP4S

interlaken

TSMC+memory+40nm

precision

fbga -1932

Untitled

hc335

EP4SE

1517-pin

SFP LVDS

GPON block diagram

Stratix PCI

mx25l25635

parametric equalizer ic

QSFP28 I2C

TSMC 40nm