ALTERA PLD CROSS REFERENCE Search Results

ALTERA PLD CROSS REFERENCE Result Highlights (5)

Part	Manufacturer	Description	Download
MP-5XRJ11PPXS-014	Amphenol Cables on Demand	Amphenol MP-5XRJ11PPXS-014 Flat Silver Satin Modular Crossed wiring Cable, RJ11 / RJ11 14ft	Datasheet
AMPAL20L10APC	Rochester Electronics LLC	PAL20L10 - OT PLD, 25ns, PAL-Type, TTL, PDIP24
LM103H-3.3	Rochester Electronics LLC	LM103 - Two Terminal Voltage Reference, 1 Output, 3.3V, BIPolar, MBCY2
LM103H-3.3/883	Rochester Electronics LLC	LM103 - Two Terminal Voltage Reference - Dual marked (7702807XA)
LM103H-3.0/883	Rochester Electronics LLC	LM103 - Two Terminal Voltage Reference - Dual marked (7702806XA)

ALTERA PLD CROSS REFERENCE Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
atmel 424 Abstract: altera PLD cross reference AT3000 actel 1020 datasheet AT18V8 8050M and logic gate EPLD 5128 8452 xl 1225 transistor Text: CMOS ASIC Converting FPGAs and PLDs to Atmel Gate Arrays Introduction Atmel is one of the only companies that designs and manufactures field programmable gate arrays FPGAs , programmable logic devices (PLDs) and high performance gate arrays. Atmel offers a seamless, direct conversion path	Original		PDF
cypress fpga Abstract: atmel 550 epm7064s cross reference XC3042A pinout epm7064 cross reference xilinx XC6216 Actel Accelerator fpga XC7336 cross reference XC4005E PHYSICAL altera PLD cross reference Text: CMOS ASIC Converting FPGAs and PLDs to Atmel Gate Arrays Introduction Atmel is one of the only companies that designs and manufactures field programmable gate arrays FPGAs , programmable logic devices (PLDs) and high performance gate arrays. Atmel offers a seamless, direct conversion	Original	ATL50/4 ATLS60/80 ATL60/4 ATV5000 ATL60/15 ATL50/15 cypress fpga atmel 550 epm7064s cross reference XC3042A pinout epm7064 cross reference xilinx XC6216 Actel Accelerator fpga XC7336 cross reference XC4005E PHYSICAL altera PLD cross reference	PDF
ACTEL CROSS REFERENCE Abstract: atmel 424 actel a10v20b fpga da altera Actel Accelerator fpga XC4005E/XC4005 EPM5130 06M7374 Atmel 224 atmel 55000 Text: CMOS ASIC Converting FPGAs and PLDs to Atmel Gate Arrays Introduction Atmel is one of the only companies that designs and manufactures field programmable gate arrays FPGAs , programmable logic devices (PLDs) and high performance gate arrays. Atmel offers a seamless, direct conversion	Original	ATL50/4 ATV2500 ATLS60/80 ATL60/4 ATV5000 ATL60/15 ACTEL CROSS REFERENCE atmel 424 actel a10v20b fpga da altera Actel Accelerator fpga XC4005E/XC4005 EPM5130 06M7374 Atmel 224 atmel 55000	PDF
FIR filter design using cordic algorithm Abstract: EPF20K rAised cosine FILTER Scrambling code QPSK qam trans Modulator block diagram CORDIC QAM modulation rake complex receiver qpsk schematic diagram MPEG4 schematic IMT-2000 Text: Implementing a W-CDMA System with Altera Devices & IP Functions September 2000, ver. 1.0 Introduction Application Note 129 In the wireless world, the demand for advanced information services is growing. Voice and low-rate data services are insufficient in a world	Original	IMT-2000, FIR filter design using cordic algorithm EPF20K rAised cosine FILTER Scrambling code QPSK qam trans Modulator block diagram CORDIC QAM modulation rake complex receiver qpsk schematic diagram MPEG4 schematic IMT-2000	PDF
304 QFP amkor Abstract: lot Code Formats altera EPM5032 EPM7128 EPLD PLMQ7192/256-160NC amkor flip verilog code for Modified Booth algorithm ALTERA MAX 5000 BYTEBLASTER epm7192 Text: Newsletter for Altera Customers ◆ Fourth Quarter ◆ December 1997 Faster FLEX 10K Devices To meet the increasing performance requirements of system designers, Altera recently unveiled plans for the next generation of programmable logic. Altera introduced two additions to the FLEX ␣ 10K family:	Original	35-micron, 10K-1 10K-2 304 QFP amkor lot Code Formats altera EPM5032 EPM7128 EPLD PLMQ7192/256-160NC amkor flip verilog code for Modified Booth algorithm ALTERA MAX 5000 BYTEBLASTER epm7192	PDF
4x2 mux Abstract: verilog code for stop watch KEYPAD 4 X 4 verilog KEYPAD 4 X 3 verilog source code synario Text: Tutorial 4 Multiple Chip Simulation Using Verilog Multiple Chip Simulation Using Verilog Multi-1 Multiple Chip Simulation Using Verilog Multi-2 Table of Contents AN INTRODUCTION TO MULTIPLE CHIP SIMULATION USING VERILOG 3 Tutorial Requirements and Installation. 3	Original	Multi-63 Multi-64 4x2 mux verilog code for stop watch KEYPAD 4 X 4 verilog KEYPAD 4 X 3 verilog source code synario	PDF
10-bit-serdes Abstract: K280A B010011 8HBC D243 Text: 2. Stratix II GX Transceiver Architecture Overview SIIGX52002-4.1 Introduction This chapter provides detailed information about the architecture of Stratix II GX devices. Figure 2–1 shows the Stratix II GX block diagram. Figure 2–1. Stratix II GX Transceiver Block Diagram	Original	SIIGX52002-4 8B/10B 10-bit-serdes K280A B010011 8HBC D243	PDF
EP2SGX60EF Abstract: CEI 23-16 circuit diagram of PPM transmitter and receiver CPRI multi rate HD-SDI over sdh PRBS10 3G-SDI serializer SIIGX52002-4 k307 Text: 2. Stratix II GX Transceiver Architecture Overview SIIGX52002-4.2 Introduction This chapter provides detailed information about the architecture of Stratix II GX devices. Figure 2–1 shows the Stratix II GX block diagram. Figure 2–1. Stratix II GX Transceiver Block Diagram	Original	SIIGX52002-4 8B/10B EP2SGX60EF CEI 23-16 circuit diagram of PPM transmitter and receiver CPRI multi rate HD-SDI over sdh PRBS10 3G-SDI serializer k307	PDF
texas handbook Abstract: 1008-B Text: Section I. Stratix II GX Transceiver User Guide This section provides information on the configuration modes for Stratix II GX devices. It also includes information on testing, Stratix II GX port and parameter information, and pin constraint information.	Original		PDF
B17C Abstract: frequency divider block diagram simple block diagram for digital clock EP1AGX50DF single phase ups block diagram AGX52001-2 8b10b EP1AGX20CF Text: 1. Arria GX Transceiver Architecture AGX52001-2.0 Introduction Arria GX is a protocol-optimized FPGA family that leverages Altera’s advanced multi-gigabit transceivers. The Arria GX transceiver blocks build on the success of the Stratix II GX family and are optimally	Original	AGX52001-2 8B/10B B17C frequency divider block diagram simple block diagram for digital clock EP1AGX50DF single phase ups block diagram 8b10b EP1AGX20CF	PDF
7809 voltage regulator datasheet Abstract: 7809 voltage regulator voltage regulator 7809 INL03991-02 7809 data sheet national semiconductor embedded system projects pdf free download toshiba web cam TB62705 ST 7809 voltage regulator excalibur Board Text: & News Views Second Quarter 2001 Newsletter for Altera Customers Altera Provides the Complete I/O Solution with the New APEX II Device Family Altera introduces the APEXTM II device family— flexible, high-performance, high-density programmable logic devices PLDs that deliver	Original	624-megabit 7809 voltage regulator datasheet 7809 voltage regulator voltage regulator 7809 INL03991-02 7809 data sheet national semiconductor embedded system projects pdf free download toshiba web cam TB62705 ST 7809 voltage regulator excalibur Board	PDF
hp laptop display LVDS connector pins datasheet Abstract: 240 pin rqfp drawing EPF10K130EFI484-2 APEX 20ke development board sram pin assignments vhdl code for lift controller EPF10K200EBI600-2 turbo encoder circuit, VHDL code 256-pin BGA drawing EPF10K50EF hp laptop display LVDS video input pin diagram Text: & News Views Second Quarter, May 2000 Newsletter for Altera Customers Altera Announces the Nios Processor for Embedded Systems Development Altera is a leader in providing the key elements required for successful system-on-aprogrammable-chip SOPC designs, including	Original		PDF
ms3400 Abstract: "module compiler" APEX20K APEX20KE 8051 keyboard design methodology Text: FPGA Express Getting Started Version 3.4, March 2000 Comments? E-mail your comments about Synopsys documentation to doc@synopsys.com Copyright Notice and Proprietary Information Copyright  2000 Synopsys, Inc. All rights reserved. This software and documentation contain confidential and proprietary	Original		PDF
mobile repair tutorial Abstract: 7809 voltage regulator datasheet design of AM transmitter final year project microdisplay epc1213 epm7192 microdisplay row column sampling pin diagram of max 488 csa 716 The MicroDisplay verilog code for interpolation filter Text: & News Views The Programmable Solutions Company Fourth Quarter, November 1999 Newsletter for Altera Customers APEX 20KE Devices Provide Unmatched System-Level Performance Altera’s new APEXTM 20KE devices, which provide the highest performance in programmable logic devices PLDs , are now	Original		PDF

lms algorithm using verilog code Abstract: lms algorithm using vhdl code ATM machine working circuit diagram using vhdl verilog code for lms adaptive equalizer verilog code for lms adaptive equalizer for audio digital IIR Filter VHDL code 8086 microprocessor based project verilog DTMF decoder qpsk demodulation VHDL CODE verilog code for fir filter using DA Text: AMPP Catalog June 1998 About this Catalog June 1998 AMPP Catalog Contents This catalog provides information on Altera Megafunction Partners Program AMPPSM partners and provides descriptions of megafunctions from each AMPP partner. The information in this catalog is current as of	Original		PDF
altera EP300 Abstract: EPM7128 EPLD ep330 mpm5192 MPM512 MPM5128 alternative bipolar transistors book Text: M M r M p , 0 9 ra m m r .lv Data Sheet September 1991, ver. 2 Introduction 0 £ Programm able Logic Devices also described as P A L s , P L A s, F P L A s, PLD s, E P L D s , E E P L D s , LC A s, and F P G A s combine the logistical advantages of standard, fixed integrated circuits with the architectural flexibility of custom	OCR Scan		PDF
C3402 Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340 Text: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase	Original	CY7C340 CY7C34X) 65-micron CY7C34XB) C3402 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C	PDF
B17C Abstract: Chapter 3 Synchronization diode handbook SDI SERIALIZER Semiconductor Reference and Application Handbook AGX52001-2 Voltage-controlled oscillator hd-SDI deserializer LVDS EP1AGX50DF Text: Section I. Arria GX Transceiver User Guide This section provides information on the configuration modes for Arria GX devices. It also includes information on testing, Arria GX port and parameter information, and pin constraint information. This section includes the following chapters:	Original		PDF
74151 PIN DIAGRAM Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B Text: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase	Original	CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 PIN DIAGRAM 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C341B CY7C342B	PDF
BT 342 project Abstract: 0945 transistor transistor gx 734 crpa Text: Stratix II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com SIIGX5V1-2.0 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and	Original		PDF
free transistor equivalent book Abstract: HD-SDI over sdh 3D123 CEI 23-16 Chapter 3 Synchronization diode handbook GX 010 texas handbook transistor DATA REFERENCE handbook vhdl code for 16 prbs generator Text: Stratix II GX Device Handbook, Volume 2 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V2-4.3 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and	Original		PDF
pc keyboard ic Abstract: altera stratix ii ep2s60 circuit diagram bc 327 K.D carrier detect phase shift finder 15.21 pcie gen 2 payload SIIGX52006-1 free transistor equivalent book DIODE ED 34 transistor bd 242 Text: Stratix II GX Device Handbook, Volume 2 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V2-4.2 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and	Original		PDF
74151 Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer Text: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of	Original	CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer	PDF
cd 1619 CP Abstract: RX SOP 1738 bc 494 b f.m transmitter Schematics AL 1450 DV hp 2212 sdc 2025 AL 2450 dv circuit diagram toggle switches 2041 BY TRANSISTOR BC 187 vhdl code for 16 prbs generator Text: Stratix II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V1-4.2 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and	Original		PDF

ALTERA PLD CROSS REFERENCE Search Results

ALTERA PLD CROSS REFERENCE Result Highlights (5)

ALTERA PLD CROSS REFERENCE Datasheets Context Search

atmel 424

cypress fpga

ACTEL CROSS REFERENCE

FIR filter design using cordic algorithm

304 QFP amkor

4x2 mux

10-bit-serdes

EP2SGX60EF

texas handbook

B17C

7809 voltage regulator datasheet

hp laptop display LVDS connector pins datasheet

ms3400

mobile repair tutorial

lms algorithm using verilog code

altera EP300

C3402

B17C

74151 PIN DIAGRAM

BT 342 project

free transistor equivalent book

pc keyboard ic

74151

cd 1619 CP