fas*366
Abstract: ESD-14 FAS366U SD12 SD13 SD14 SD15 timing diagram of DMA Transfer FAS366
Text: QLogic Corporation FAS366U Fast Architecture SCSI Processor Data Sheet Features H Compliance with ANSI draft Fast–20 standard H Compliance with ANSI X3T10/855D SCSI–3 parallel interface SPI standard H Compliance with ANSI SCSI configured automatically (SCAM) protocol levels 1 and 2
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FAS366U
X3T10/855D
fas*366
ESD-14
FAS366U
SD12
SD13
SD14
SD15
timing diagram of DMA Transfer
FAS366
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PDF
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FAS368M
Abstract: fas*366 db15 dimensions timing diagram of DMA Transfer 53368 FAS366U QLOGIC fas
Text: QLogic Corporation FAS368M Fast Architecture SCSI Processor Data Sheet Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Compliance with ANSI X3T10/1142D SCSI Parallel Interconnect-2 SPI-2 standard Compliance with ANSI SCSI configured
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FAS368M
X3T10/1142D
FAS368M
fas*366
db15 dimensions
timing diagram of DMA Transfer
53368
FAS366U
QLOGIC fas
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PDF
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TAG2T5-100B
Abstract: transistor 13001 replacement tag86 transistor 13001 replacement guide thermal transfer printhead TAG2-100 TT210SM CT0753X2 tag27 tag9t3-100b
Text: IDENTIFICATION P R O D U C T S MEET ANSI/TIA/EIA-606-A REQUIREMENTS The ANSI/TIA/EIA-606-A standard was developed to specify the requirements for labeling the telecommunications foundation in buildings. To help fulfill these requirements, HellermannTyton offers a complete identification product
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ANSI/TIA/EIA-606-A
CMF04
CMF072
200oF
FOM-175
TAG2T5-100B
transistor 13001 replacement
tag86
transistor 13001 replacement guide
thermal transfer printhead
TAG2-100
TT210SM
CT0753X2
tag27
tag9t3-100b
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PDF
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MPR-50 Multi-Port Router
Abstract: 42150 cea 709.3 CEA-709 PCC-10 multiple channel router 42150R MPR-50
Text: MPR-50 Multi-Port Router Model 42150R Description The MPR-50 Multi-Port Router provides ANSI/CEA-709.1 compliant routing among five channels: four TP/FT-10 Free Topology Twisted Pair ANSI/CEA-709.3 channels and one LONMARK standard TP/XF-1250 channel. Each of the TP/FT-10 channel connections
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MPR-50
42150R
ANSI/CEA-709
TP/FT-10
TP/XF-1250
MPR-50 Multi-Port Router
42150
cea 709.3
CEA-709
PCC-10
multiple channel router
42150R
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PDF
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Untitled
Abstract: No abstract text available
Text: Atmel M90E32AS Enhanced Poly-Phase High-Performance Wide-Span Energy Metering IC PRELIMINARY DATASHEET FEATURES Metering Features • Metering features fully in compliance with the requirements of IEC62052-11, IEC62053-22 and IEC62053-23, ANSI C12.1 and ANSI C12.20; applicable in polyphase class 0.2S, 0.5S or class 1 watt-hour meter or class 2 var-hour meter.
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M90E32AS
IEC62052-11,
IEC62053-22
IEC62053-23,
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PDF
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circuit diagram of PPM transmitter and receiver
Abstract: 2TD12 S2052 S2052B S2052C K28-5 gigabit media converter 27 mhz transmitter and receiver report 1E121 clock multiplier TTL 60 duty cycle
Text: DEVICE SPECIFICATION S2052 S2052 FIBRE CHANNEL AND GIGABIT ETHERNET TRANSCEIVER BiCMOS PECL CLOCK FIBRE CHANNEL AND GENERATOR GIGABIT ETHERNET TRANSCEIVER FEATURES • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol
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S2052
X3T11
10-bit
800mW
circuit diagram of PPM transmitter and receiver
2TD12
S2052
S2052B
S2052C
K28-5
gigabit media converter
27 mhz transmitter and receiver report
1E121
clock multiplier TTL 60 duty cycle
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PDF
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BC 543
Abstract: at98MHz
Text: VITESSE SEMICONDUCTOR CORPORATION SEMICONDUCTOR CORPORATION Advanced Product Information VSC7212 Gigabit Interconnect Chip Features • ANSI X3T11 Compliant Fibre Channel and IEEE 802.3z Compliant Gigabit Ethernet Transceiver • Received Data Aligned to Local REFCLK or to
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VSC7212
X3T11
8B/10B
VSC7211,
VSC7214
VSC7216
G52268-0,
BC 543
at98MHz
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PDF
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BC 543
Abstract: VSC7125 VSC7135 VSC7216
Text: VITESSE SEMICONDUCTOR CORPORATION Preliminary Datasheet Multi-Gigabit Interconnect Chip VSC7216 Features • 4 ANSI X3T11 Fibre Channel and IEEE 802.3z Gigabit Ethernet Compliant Transceivers • Received Data Aligned to Local REFCLK or to Recovered Clock
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VSC7216
X3T11
8B/10B
G52206-0,
BC 543
VSC7125
VSC7135
VSC7216
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PDF
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BC 543
Abstract: No abstract text available
Text: VITESSE SEMICONDUCTOR CORPORATION SEMICONDUCTOR CORPORATION Advance Product Information VSC7212 Gigabit Interconnect Chip Features • ANSI X3T11 Compliant Fibre Channel and IEEE 802.3z Compliant Gigabit Ethernet Transceiver • Received Data Aligned to Local REFCLK or to
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VSC7212
X3T11
8B/10B
VSC7211,
VSC7214
VSC7216
G52268-0,
BC 543
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PDF
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tellabs
Abstract: BC 543 5K28 VSC7216UC 18T marking
Text: VITESSE SEMICONDUCTOR CORPORATION Preliminary Datasheet Multi-Gigabit Interconnect Chip VSC7216 Features • 4 ANSI X3T11 Fibre Channel and IEEE 802.3z Gigabit Ethernet Compliant Transceivers • Received Data Aligned to Local REFCLK or to Recovered Clock
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VSC7216
X3T11
8B/10B
VSC7211/7212/7214
G52206-0,
VSC7216
tellabs
BC 543
5K28
VSC7216UC
18T marking
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PDF
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49mhz remote control receiver circuit
Abstract: 49mhz transmitter and receiver
Text: VITESSE SEMICONDUCTOR CORPORATION Advance Product Information Gigabit Interconnect Chip VSC7211 Features • Deskewing of +/- 2 Bits Cable Skew at the Receiver Across Multiple Chips • ANSI X3T11 Compatible Fibre Channel Transceiver • 8B/10B Encoder/Decoder
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VSC7211
X3T11
8B/10B
VSC7214
64-Pin
VSC7211
backp110
G52166-0,
49mhz remote control receiver circuit
49mhz transmitter and receiver
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PDF
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s2054
Abstract: S2052 media converter optical fibre
Text: DEVICE SPECIFICATION S2054 S2054 FIBRE CHANNEL AND GIGABIT ETHERNET TRANSCEIVER BiCMOS LVPECL CLOCK GENERATOR FIBRE CHANNEL AND GIGABIT ETHERNET TRANSCEIVER FEATURES GENERAL DESCRIPTION • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol
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S2054
X3T11
10-bit
s2054
S2052
media converter optical fibre
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PDF
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IC 75176B
Abstract: intel 8051 INSTRUCTION SET COM20051ILJ 75176b ARCNET driver HYC9088 intel microprogram sequencer microsequencer intel RG-59/u 80C32
Text: COM20051I Integrated Microcontroller and ARCNET ANSI 878.1 Interface FEATURES !" High Performance/Low Cost !" Microcontroller Based on Popular 8051 Architecture !" Intel 8051 Instruction Set Compatible !" Drop-In Replacement for 80C32 PLCC !" Network Supports up to 255 Nodes
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COM20051I
80C32
RS-485,
IC 75176B
intel 8051 INSTRUCTION SET
COM20051ILJ
75176b
ARCNET driver
HYC9088
intel microprogram sequencer
microsequencer intel
RG-59/u
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PDF
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S2044
Abstract: S2045 Semiconductor Laser International Corporation
Text: DEVICE SPECIFICATION OPEN FIBER CONTROL FEATURES • Implements redundant safety interlock for laserbased fiber optic systems • Functionally compliant with ANSI XT311 Fibre Channel physical standard • Enables Class 1 safety compliance for FDA, ANSI, and IEC guidelines
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S2036
XT311
S2042/S2043,
S2044/S2045
28-pin
1997Applied
S2044
S2045
Semiconductor Laser International Corporation
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PDF
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Untitled
Abstract: No abstract text available
Text: SN75146 DUAL DIFFERENTIAL LINE RECEIVER SLLS0158 - FEBRUARY 1986 - REVISED MAY 1995 D OR P PACKAGE CTOP VIEW Meets or Exceeds the Requirements of ANSI EIA/TIA-422-B and -423-B Meets or Exceeds the Requirements of ANSI EIA/TIA-232-E and ITU Recommendation V.28 With External
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SN75146
SLLS0158
EIA/TIA-422-B
-423-B
EIA/TIA-232-E
pA9637
iA9639
11N--
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PDF
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HYC9088
Abstract: No abstract text available
Text: COM20051 STANDARD MICROSYSTEMS CORPORATION Integrated Microcontroller and ARCNET ANSI 878.1 Interface FEATURES High Performance/Low Cost Microcontroller Based on Popular 8051 Architecture Intel 8051 Instruction Set Compatible Drop-In Replacement for 80C32 PLCC
|
OCR Scan
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COM20051
80C32
RS-485,
CQM20051
HYC9088
|
PDF
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Untitled
Abstract: No abstract text available
Text: ADVANCE INFORMATION FIBRE CHANNEL AND GIGABIT ETHERNET TRANSCEIVER FEATURES • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards and IEEE 802.3Z Gigabit Ethernet Applications • Transmitter incorporates phase-locked loop
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OCR Scan
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S2052
X3T11
10-bit
800mW
|
PDF
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S2061
Abstract: No abstract text available
Text: ADVANCE INFORMATION FEATURES • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards and IEEE 802.3z Gigabit Ethernet Applications • Transmitter incorporates phase-locked loop PLL providing clock synthesis from low-speed
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OCR Scan
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X3T11
1998/Revision
S2061
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PDF
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SY69612
Abstract: HP 85700A HP53132A
Text: * SONET/SDH/ATM OC-12 TRANSCEIVER SYNERGY SEMICONDUCTOR FEATURES PRELIMINARY INFORMATION SY69612 DESCRIPTION A complete SONET/SDH Transmitter & Receiver Complies with Bellcore, CCiTT and ANSI specifications On-chip PLL for clock generation SONET framing defeatable
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OC-12
SY69612
SY69612
OC-12
84MHz
44MHz)
SY87612,
STS-12/OC-12
HP 85700A
HP53132A
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PDF
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Am79C83
Abstract: No abstract text available
Text: Am79C83 Fiber Optic Ring Media Access Controller FORMAC Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Implements Media Access Control (MAC) layer protocol for the ANSI X3T9.5 standard (Fiber Distributed Data Interface, FDDI) ■ Error detection capability
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OCR Scan
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Am79C83
09731-031B
31-029B
1-023A
-024A
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PDF
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Untitled
Abstract: No abstract text available
Text: Sills«* COM20051 STANDARD MICROSYSTEMS CORPORATION Integrated Microcontroller and ARCNET ANSI 878.1 Interface FEATURES High Performance/Low Cost Microcontroller Based on Popular 8051 Architecture Intel 8051 Instruction Set Compatible Drop-In Replacement for 80C32 PLCC
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OCR Scan
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COM20051
80C32
RS-485,
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PDF
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receiver sat pro
Abstract: No abstract text available
Text: >1MCC DEVICE SPECIFICATION QUAD FIBRE CHANNEL TRANSCEIVER S2076 GENERAL DESCRIPTION FEATURES • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards. • 1062 MHz Fibre Channel operating rate -1/2 Rate Operation
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OCR Scan
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S2076
X3T11
S2076
receiver sat pro
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PDF
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am79c83
Abstract: am79c83gc H14E RB610
Text: H P relim inary Am79C83 Advanced Micro Devices Fiber Optic Ring Media Access Controller FORMAC DISTINCTIVE CHARACTERISTICS • ■ Implements Media Access Control (MAC) layer protocol for the ANSI X3T9.5 standard (Fiber Distributed Data Interface, FDDI)
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OCR Scan
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Am79C83
AM79C83
145-Lead
CGX145)
am79c83gc
H14E
RB610
|
PDF
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diode B14A
Abstract: B14A S2035 52033 K285 S2032
Text: PRELIMINARY DEVICE SPECIFICATION HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS FEATURES • Functionally compliant with ANSI X3T9.3 Fibre Channel physical and transmission protocol standards • S2032 transmitter incorporates phase-locked loop PLL providing clock synthesis from lowspeed reference
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OCR Scan
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S2032/S2033
S2032
S2033
20-bit
GDD1413
diode B14A
B14A
S2035
52033
K285
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PDF
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