AS7C33128NTF18B Search Results

AS7C33128NTF18B Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
AS7C33128NTF18B		Alliance Semiconductor	NTD Sync SRAM - 3.3V		Original	PDF

AS7C33128NTF18B Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
64KX32 Abstract: AS7C33128NTF18B AS7C33128PFD18B AS7C33128PFS18B Text: April 2005 AS7C33128NTF18B 3.3V 128K x 18 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 131,072 words x 18 bits NTD architecture for efficient bus operation Fast clock to data access: 7.5/8.0/10.0 ns	Original	PDF	AS7C33128NTF18B 100-pin 64KX32 AS7C33128NTF18B AS7C33128PFD18B AS7C33128PFS18B
64KX32 Abstract: AS7C33128NTD18B AS7C33128PFD18B AS7C33128PFS18B Text: April 2005 AS7C33128NTD18B 3.3V 128Kx18 Pipelined SRAM with NTDTM Features • Organization: 131,072 words × 18 bits • NTD architecture for efficient bus operation • Fast clock speeds to 200 MHz • Fast clock to data access: 3.0/3.5/4.0 ns • Fast OE access time: 3.0/3.5/4.0 ns	Original	PDF	AS7C33128NTD18B 100-pin 64KX32 AS7C33128NTD18B AS7C33128PFD18B AS7C33128PFS18B
64KX32 Abstract: AS7C33128PFD18B AS7C33128PFS18B 64K32 Text: April 2005 AS7C3364NTD32B AS7C3364NTD36B 3.3V 64Kx32/36 Pipelined SRAM with NTDTM Features • Clock enable for operation hold • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ • Self-timed write cycles	Original	PDF	AS7C3364NTD32B AS7C3364NTD36B 100-pin 64KX32 AS7C33128PFD18B AS7C33128PFS18B 64K32
64KX32 Abstract: AS7C33128PFD18B AS7C33128PFS18B Text: April 2005 AS7C3364NTF32B AS7C3364NTF36B 3.3V 64K x 32/36 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 65,536 words × 32 or 36 bits NTD architecture for efficient bus operation	Original	PDF	AS7C3364NTF32B AS7C3364NTF36B 100-pin 64KX32 AS7C33128PFD18B AS7C33128PFS18B