Untitled
Abstract: No abstract text available
Text: AS7C33128PFS18B February 2004 3.3V 128K x 18 pipeline burst synchronous SRAM Features • • • • • • • Organization: 131,072 words × 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/4.0 ns Fast OE access time: 3.5/4.0 ns
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AS7C33128PFS18B
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AS7C33128PFD18B)
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Untitled
Abstract: No abstract text available
Text: AS7C33128PFS16B AS7C33128PFS18B October 2003 3.3V 128K x 16/18 pipeline burst synchronous SRAM Features •Byte write enables •Multiple chip enables for easy expansion •3.3V core power supply •2.5V or 3.3V I/O operation with separate VDDQ •30 mW typical standby power in power down mode
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AS7C33128PFS16B
AS7C33128PFS18B
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AS7C33128PFD18B)
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Abstract: AS7C33128PFD18B AS7C33128PFS18B
Text: AS7C33128PFS18B December 2004 3.3V 128K x 18 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • • • Organization: 131,072 words × 18 bits Fast clock speeds to 200 MHz Fast clock to data access: 3.0/3.5/4.0 ns
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AS7C33128PFS18B
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AS7C33128PFD18B
AS7C33128PFS18B
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Untitled
Abstract: No abstract text available
Text: AS7C33128PFD18B May 2004 3.3V 128K x 18 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • • • • Organization: 131,072 words × 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/4.0 ns
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AS7C33128PFD18B
AS7C33128PFS18B)
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Untitled
Abstract: No abstract text available
Text: AS7C3364FT32B AS7C3364FT36B December 2004 3.3V 64K x 32/36 Flow Through Synchronous SRAM Features • • • • • • • • • • • • • Organization: 65,536 words × 32 or 36 bits Fast clock to data access: 6.5/7.5/8.0/10.0 ns Fast OE access time: 3.5/4.0 ns
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AS7C3364FT32B
AS7C3364FT36B
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AS7C33128FT18B
Abstract: AS7C33128PFD18B AS7C33128PFS18B 64KX32
Text: February 2005 AS7C3364PFD32B AS7C3364PFD36B 3.3V 64K X 32/36 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • • • Organization: 65,536 words x 32 or 36 bits Fast clock speeds to 200 MHz Fast clock to data access: 3.0/3.5/4.0 ns
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AS7C3364PFD32B
AS7C3364PFD36B
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AS7C33128FT18B
AS7C33128PFD18B
AS7C33128PFS18B
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Abstract: AS7C33128PFD18B AS7C33128PFS18B
Text: AS7C33128PFD18B February 2005 3.3V 128K x 18 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • • • Organization: 131,072 words × 18 bits Fast clock speeds to 200 MHz Fast clock to data access: 3.0/3.5/4.0 ns
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AS7C33128PFD18B
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AS7C33128PFS18B
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Abstract: AS7C33128FT18B AS7C33128PFD18B AS7C33128PFS18B
Text: December 2004 AS7C3364PFS32B AS7C3364PFS36B 3.3V 64K X 32/36 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • • • Organization: 65,536 words x 32 or 36 bits Fast clock speeds to 200 MHz Fast clock to data access: 3.0/3.5/4.0 ns
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AS7C3364PFS32B
AS7C3364PFS36B
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AS7C33128FT18B
AS7C33128PFD18B
AS7C33128PFS18B
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1H08S
Abstract: PI6C2405A-1HW ASM706CUA SOIC-6 microchip ADM809RAR ADM705AN MAX809SEUR T ASM5P2309-1H-16-S K7N163601B MAX810JEUR
Text: Supervisors Cross Reference Guide Alliance Maxim/Dallas IMP ASM1232LP DS1232LPS-2 IMP1232LP ASM1232LPCMA DS1232LP IMP1232LPCMA ASM1232LPEMA DS1232LP IMP1232LPEMA ASM1232LPN DS1232LP IMP1232LPN Analog Devices Micrel Microchip MIC1232N TC1232CPA - - - - - -
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ASM1232LP
DS1232LPS-2
IMP1232LP
ASM1232LPCMA
DS1232LP
IMP1232LPCMA
ASM1232LPEMA
IMP1232LPEMA
ASM1232LPN
1H08S
PI6C2405A-1HW
ASM706CUA
SOIC-6 microchip
ADM809RAR
ADM705AN
MAX809SEUR T
ASM5P2309-1H-16-S
K7N163601B
MAX810JEUR
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ADM809RAR
Abstract: AS7C256A hsbga 416 lcd cross reference IDT CYPRESS CROSS REFERENCE clocks DS1232* watch dog timer Product Selector Guide mbg* sot143 FS781 IDT74SSTV16857
Text: DISCLAIMER Alliance Semiconductor Corporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Alliance Semiconductor does not assume any responsibility for use of any circuitry described other than the circuitry embodied
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IS61LV25616AL
IS61LV5128AL
IS61LV6416
IS61C6416
IS61LV1024
48-pin
AS9C25256M2036L
AS9C25512M2018L
512Kx18
ADM809RAR
AS7C256A
hsbga 416
lcd cross reference
IDT CYPRESS CROSS REFERENCE clocks
DS1232* watch dog timer
Product Selector Guide
mbg* sot143
FS781
IDT74SSTV16857
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Abstract: AS7C33128NTF18B AS7C33128PFD18B AS7C33128PFS18B
Text: April 2005 AS7C33128NTF18B 3.3V 128K x 18 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 131,072 words x 18 bits NTD architecture for efficient bus operation Fast clock to data access: 7.5/8.0/10.0 ns
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Abstract: AS7C33128NTD18B AS7C33128PFD18B AS7C33128PFS18B
Text: April 2005 AS7C33128NTD18B 3.3V 128Kx18 Pipelined SRAM with NTDTM Features • Organization: 131,072 words × 18 bits • NTD architecture for efficient bus operation • Fast clock speeds to 200 MHz • Fast clock to data access: 3.0/3.5/4.0 ns • Fast OE access time: 3.0/3.5/4.0 ns
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Abstract: AS7C33128PFD18B AS7C33128PFS18B 64K32
Text: April 2005 AS7C3364NTD32B AS7C3364NTD36B 3.3V 64Kx32/36 Pipelined SRAM with NTDTM Features • Clock enable for operation hold • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ • Self-timed write cycles
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Abstract: AS7C33128PFD18B AS7C33128PFS18B
Text: April 2005 AS7C3364NTF32B AS7C3364NTF36B 3.3V 64K x 32/36 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 65,536 words × 32 or 36 bits NTD architecture for efficient bus operation
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Abstract: AS7C33128FT18B AS7C33128PFD18B AS7C33128PFS18B
Text: AS7C33128FT18B December 2004 3.3V 128K x 18 Flow Through Synchronous SRAM Features • • • • • • • • • • • • • Organization: 131,072 words × 18 bits Fast clock to data access: 6.5/7.5/8.0/10.0 ns Fast OE access time: 3.5/4.0 ns
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AS7C33128PFS18B
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