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Abstract: No abstract text available
Text: sames SA9101 PCM FRAME ALIGNER FEATURES n Frame alignment/synthesis for PCM30 double frame and CRC-multiframe format. n n n n n n n n Meets CCITT Rec.G704 n n Interface to route selectable between HDB3 and fibre optical HDB3 outputs switchable between fully
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SA9101
PCM30
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PEB2235
Abstract: cr6B automatic HIGHWAY signalling SYSTEM full circuit SR-5B0
Text: sames SA9101 PCM FRAME ALIGNER FEATURES n Frame alignment/synthesis for PCM30 double frame and CRC-multiframe format. n n n Meets CCITT Rec.G704 n Interface to route selectable between HDB3 and fibre optical n HDB3 outputs switchable between fully bauded and half bauded format
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SA9101
PCM30
PEB2235
cr6B
automatic HIGHWAY signalling SYSTEM full circuit
SR-5B0
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Untitled
Abstract: No abstract text available
Text: BACK sames SA9101 PCM FRAME ALIGNER FEATURES n Frame alignment/synthesis for PCM30 double frame and CRC-multiframe format. n n n Meets CCITT Rec.G704 n Interface to route selectable between HDB3 and fibre optical n HDB3 outputs switchable between fully bauded and half bauded format
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PCM30
SA9101
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cr6B
Abstract: CR7B Eland sa9030
Text: BACK PRELIMINARY sames SA9030 PCM FRAME ALIGNER FEATURES n Frame alignment/synthesis for PCM30 double frame and multiframe format. n Meets CCITT Rec.G704 n Interface to route selectable between HDB3 and fibre optical n Error checking via CRC4 procedure n Insertion and extraction of alarms and
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PCM30
SA9030
cr6B
CR7B
Eland
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siemens master trip relay
Abstract: ADSL 2 Chip Sets for DSLAM applications CS thyristor cs 3-04 P-TQFP-144-1
Text: ICs for Communications Broadband Multichannel Subscriber Line-Interface Circuits for Splitterless G.Lite Applications B-MuSLIC PEB 4550 PEB 3554 PEB 55504 PEB 35508 Preliminary Product Overview 05.99 • %0X6/,& 5HYLVLRQ +LVWRU\ &XUUHQW 9HUVLRQ Previous Version:
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AF-UNI-0010
Abstract: S1215 amcc part marking remote control rx tx
Text: AMUR CONCEPT Product Brief Part Number S1215, Revision 1.4, September 2005 Deep channelization SONET/SDH to PDH framer and 1K Channels HDLC/ATM/GFP processor AMUR interfaces with 155Mbps/622Mbps SONET/SDH 1xSTS-12/STM-4, 4xSTS-3/STM-1 optical signals and 12x DS3/E3 or
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S1215,
155Mbps/622Mbps
1xSTS-12/STM-4,
32xDS1/E1/
AF-UNI-0010
S1215
amcc part marking
remote control rx tx
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etm757
Abstract: 5966-1444E ETM759 E4209B E1618A V743 controller area network bus E4219A ETM761 sonet alarms
Text: 622 Mb/s Optical Line Interface Agilent Technologies Broadband Series Test System E1618A Product Features The Agilent E1618A 622 Mb/s Optical Line Interface LIF is a single slot, single port (1 Tx/ 1 Rx) VXI module for the BSTS that provides access to OC-12c/STM-4c devices.
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E1618A
E1618A
OC-12c/STM-4c
OC-12c
STS-12c
5966-1444E
etm757
ETM759
E4209B
V743
controller area network bus
E4219A
ETM761
sonet alarms
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RFRM1
Abstract: No abstract text available
Text: T3BwP Device Channelized DS3 Access Solution TXC-06826 FEATURES DESCRIPTION • Complete single-chip channelized DS3 solution T3BwP TXC-06826 is a RISC processor based device that supports the requirements of next-generation channelized DS3 access systems. T3BwP integrates an M13 multiplexer, 28 DS1
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TXC-06826
672-channel
100/H
4096-channel
TXC-06826-MB
RFRM1
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SE21
Abstract: tlu4 X40H-X57H B1B24 NRZ to MFM encoder SF 119 D ATT Preliminary Technical reference pub 62411 A23 1101-01 ami c21 TDE19
Text: QDS1F Device QUAD DS1 Framer TXC-03102 FEATURES DESCRIPTION • D4 SF, ESF including FDL support , and transparent framing modes • Detects, counts and forces line code errors (BPVs and excess zeros), CRC errors (ESF only), and frame bit errors The QDS1F is a 4-channel DS1 (1.544 Mbit/s) framer
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TXC-03102
TXC-03102-MB
SE21
tlu4
X40H-X57H
B1B24
NRZ to MFM encoder
SF 119 D
ATT Preliminary Technical reference pub 62411
A23 1101-01
ami c21
TDE19
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CH341A
Abstract: 03104 bilq AMI 52 732 V TS16 TXC-03114 national alarm RFTS-10 X77H-X70H
Text: QE1F-Plus Device Quad E1 Framer-Plus TXC-03114 FEATURES DESCRIPTION • Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and transparent non-framing mode • Frame alignment detection and loss of frame
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TXC-03114
TXC-03114-MB
CH341A
03104 bilq
AMI 52 732 V
TS16
TXC-03114
national alarm
RFTS-10
X77H-X70H
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VE880
Abstract: LE88311 sumida c8100 MBT3946DW1T1LRG LE88311DLC IIR NEON le88331 MURS120DICT-ND VE880 "pin compatible" rft rg1
Text: A D V A N C E D C O P Y Le88311/331 Dual Channel Tracking Battery VoicePort™ Device VE880 Series APPLICATIONS ORDERING INFORMATION Voice enabled Cable and DSL Modems Voice over IP/ATM - Integrated Access Devices IAD Residential VoIP Gateways and Routers
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Le88311/331
VE880
Le88311/331
LE88311
sumida c8100
MBT3946DW1T1LRG
LE88311DLC
IIR NEON
le88331
MURS120DICT-ND
VE880 "pin compatible"
rft rg1
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GR-499-CORE
Abstract: No abstract text available
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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TXC-03103
TXC-03103-MB
GR-499-CORE
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GR-499-CORE
Abstract: CH1290 tds0 1150
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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TXC-03103
TXC-03103-MB
GR-499-CORE
CH1290
tds0 1150
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intel 7882
Abstract: Tepro Technology TE 2395 motorola 431an TXC-06830 431and
Text: TEPro Device Channelized DS3 Access Solution TXC-06830 DATA SHEET PRODUCT PREVIEW LINE SIDE DS1/E1 Monitor Port 4 DS1/E1/DS3 interface, 145 TEPro™ TXC-06830 is a RISC processor-based device that supports the requirements of next-generation channelized DS3 access
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TXC-06830
TXC-06830)
096-channel
intel 7882
Tepro Technology
TE 2395 motorola
431an
TXC-06830
431and
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GR-499-CORE
Abstract: RFRM1 TXC-06826-MB
Text: T3BwP Device Channelized DS3 Access Solution TXC-06826 DATA SHEET PRODUCT PREVIEW • RISC processor with royalty-free DD-AMPS™ firmware Drivers, Data link, Alarms, Messaging, Performance/configuration objects, and Signaling • Host communication via royalty-free, messagebased, POSIX-compatible API
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TXC-06826
096-channel
100/H
GR-499-CORE
RFRM1
TXC-06826-MB
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1N128
Abstract: 54016
Text: TEPro-Fx28 Device Channelized DS1/E1 Access Solution TXC-06836 DATA SHEET PRODUCT PREVIEW • Complete single-chip channelized DS1/E1 solution • RISC processor with royalty-free DD-AMPS™ firmware Drivers, Data link, Alarms, Messaging, Performance/configuration objects, and Signaling
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TEPro-Fx28TM
TXC-06836
100/H
15-minute
TXC-06836-MB,
TEPro-Fx28
TXC-06836
1N128
54016
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X13376
Abstract: No abstract text available
Text: T1Fx8 Device 8-Channel T1 Framer TXC-03108 FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , auto search, and independent transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1; Gapped clock or marker; Auxiliary
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TXC-03108
TXC-03108-MB
X13376
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RFD24
Abstract: CH1290 LBD21 30f 124
Text: BACK QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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TXC-03103
TXC-03103-MB
RFD24
CH1290
LBD21
30f 124
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ML924
Abstract: clare relay cup earom UC90Q cerberus CERBERUS MG PIC1650-536 SL490
Text: PICI650-532/533 APLESSEY ADVANCE INFORMATION Sem iconductors • Advance information is issued to advise Customers of new additions to the Plessey Semiconductors range which, nevertheless, still have 'pre-production' status. Details given may, therefore, change without notice although we would expect this performance data to be
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Untitled
Abstract: No abstract text available
Text: DEVELOPMENT DATA This data sheet contains advance inform ation and specifications are subject to change w ithout notice. PCB2310 1ST BUS INTERFACE IBI HOW TO USE THIS DATA SHEET • Section 1 introduces the 1ST bus interface. The functional areas of the circuit are shown with a block
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PCB2310
PCB80C51
CB2310
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Valvo Bauelemente GmbH
Abstract: highway speed checker circuit diagram PCB2391 valvo BAUELEMENTE VALVO Valvo Bauelemente philips app abstract valvo oscillator VALVO QUARTZ HIGHWAY 09 20 PIN IC PIN DIAGRAM
Text: Laboratory Report 1 Development specification of the PCB2391 biphase echo canceller R. v.d. Brink Philips C om ponents Application Laboratory Eindhoven, the Netherlands. Abstract T h e P C B I 3 9 1 is a C M O S i nte gr ate d circuit f o r m in g an I n t e g r a te d Services Digital N e t w o r k I S D N two
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PCB2391
ETT89007
Valvo Bauelemente GmbH
highway speed checker circuit diagram
valvo
BAUELEMENTE VALVO
Valvo Bauelemente philips
app abstract
valvo oscillator
VALVO QUARTZ
HIGHWAY 09 20 PIN IC PIN DIAGRAM
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pcm multiplexer
Abstract: No abstract text available
Text: TELECOMMUNICATIONS G LO SSA R Y TELECOMMUNICATIONS GLOSSARY Term A/D Analog to Digital Converter ADI (Alternate Digit Inversion) A law Aliasing Noise AMI signal (Alternate Mark Inversion) Anti Aliasing Filter Asynchronous Auto Power Control (APC) Base-band Transmission Type
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PCB2310
Abstract: PCB2310WP
Text: DEC i 3 1990 DEVELOPMENT DATA PCB2310 This data sheet contains advance information and specifications are subject to change without notice. SUPERSEDES DATA OF JANUARY 1990 1ST BUS INTERFACE IBI HOW TO USE THIS DATA SHEET • Section 1 introduces the 1ST bus interface. The
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PCB2310
7Z81421
44-LEAD
OT187AA
Z25134
PCB2310
PCB2310WP
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Untitled
Abstract: No abstract text available
Text: 1 Overview The B-MuSLIC chipset Figure 1-1 is used in ADSL-Lite DSLAMs for Central Offices (COs) and Digital-Loop Carrier systems (DLCs). The B-MuSLIC (Broadband Multichannel Subscriber Splitterless G.Lite Applications) chipset comprises: Line-lnterface
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P-TQFP-144
-44H0
lA-BlDlCl144x
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