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    sot-89 MARKING CODE ab

    Abstract: SS TRANSISTOR IN SOT 23 PACKAGING 125OC TP5322 TP5322K1-G Marking N8
    Contextual Info: TP5322 P-Channel Enhancement-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► The Supertex TP5322 is a low threshold enhancementmode normally-off transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate


    Original     		TP5322 TP5322 110pF DSFP-TP5322 B052109 sot-89 MARKING CODE ab SS TRANSISTOR IN SOT 23 PACKAGING 125OC TP5322K1-G Marking N8 PDF

    Contextual Info: TP5322 P-Channel Enhancement-Mode Vertical DMOS FETs General Description Features The Supertex TP5322 is a low threshold enhancementmode normally-off transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device


    Original     		TP5322 TP5322 110pF DSFP-TP5322 B052109 PDF

    sivn

    Abstract: vn2lw VN3205N8-G seimens vn3205 125OC VN3205N3-G VN3205ND DMOS B0521
    Contextual Info: VN3205 N-Channel Enhancement-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with


    Original     		VN3205 DSFP-VN3205 B052109 sivn vn2lw VN3205N8-G seimens vn3205 125OC VN3205N3-G VN3205ND DMOS B0521 PDF