Untitled
Abstract: No abstract text available
Text: DATA SHEET 1G bits DDR3 SDRAM EDJ1108DBSE 128M words x 8 bits EDJ1116DBSE (64M words × 16 bits) Specifications Features • Density: 1G bits • Organization ⎯ 16M words × 8 bits × 8 banks (EDJ1108DBSE) ⎯ 8M words × 16 bits × 8 banks (EDJ1116DBSE)
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EDJ1108DBSE
EDJ1116DBSE
EDJ1108DBSE)
EDJ1116DBSE)
78-ball
96-ball
1600Mbps/1333Mbps
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EDJ1108DJBG-DJ-F
Abstract: No abstract text available
Text: DATA SHEET 1G bits DDR3 SDRAM EDJ1108DJBG 128M words x 8 bits EDJ1116DJBG (64M words × 16 bits) • Density: 1G bits • Organization 16M words × 8 bits × 8 banks (EDJ1108DJBG) 8M words × 16 bits × 8 banks (EDJ1116DJBG) • Package 78-ball FBGA (EDJ1108DJBG)
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EDJ1108DJBG
EDJ1116DJBG
EDJ1108DJBG)
EDJ1116DJBG)
78-ball
96-ball
1600Mbps/1333Mbps
EDJ1108DJBG-DJ-F
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PDF
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hynix ddr3
Abstract: bc4 bl4 bl8 otf ddr3 2133 diode T9 AC-DC DDR3-1333 DDR3-1866 DDR3-2133 a12b DD3-800
Text: APCPCWM_4828539:WP_0000002WP_000000 APCPCWM_4828539:WP_0000002WP_0000002 DDR3+ Device Operation DDR3+ SDRAM Device Operation 1 *3e46a6cd-6391* B20337/178.104.2.234/2010-08-27 12:03 APCPCWM_4828539:WP_0000002WP_000000 APCPCWM_4828539:WP_0000002WP_0000002 DDR3+ Device Operation
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0000002WP
3e46a6cd-6391*
B20337/178
hynix ddr3
bc4 bl4 bl8 otf
ddr3 2133
diode T9 AC-DC
DDR3-1333
DDR3-1866
DDR3-2133
a12b
DD3-800
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PDF
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bc4 bl4 bl8 otf
Abstract: 240 pin DIMM DDR3 through hole
Text: DDR3 Device Operation DDR3 SDRAM Device Operation 1 DDR3 Device Operation Contents 1. Functional Description 1.1 Simplified State Diagram 1.2 Basic Functionality 1.3 RESET and Initialization Procedure 1.3.1 Power-up Initialization Sequence 1.3.2 Reset Initialization with Stable Power
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ELPIDA DDR3
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET 1G bits DDR3 SDRAM EDJ1108DJBG 128M words x 8 bits EDJ1116DJBG (64M words × 16 bits) Specifications Features • Density: 1G bits • Organization 16M words × 8 bits × 8 banks (EDJ1108DJBG) 8M words × 16 bits × 8 banks (EDJ1116DJBG)
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EDJ1108DJBG
EDJ1116DJBG
EDJ1108DJBG)
EDJ1116DJBG)
78-ball
96-ball
1600Mbps/1333Mbps
ELPIDA DDR3
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PDF
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ELPIDA DDR3
Abstract: ELPIDA DRAM selection guide ELPIDA DDR3 User
Text: DATA SHEET 1G bits DDR3 SDRAM EDJ1108DJBG 128M words x 8 bits EDJ1116DJBG (64M words × 16 bits) Specifications Features • Density: 1G bits • Organization 16M words × 8 bits × 8 banks (EDJ1108DJBG) 8M words × 16 bits × 8 banks (EDJ1116DJBG)
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Original
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EDJ1108DJBG
EDJ1116DJBG
EDJ1108DJBG)
EDJ1116DJBG)
78-ball
96-ball
1600Mbps/1333Mbps
ELPIDA DDR3
ELPIDA DRAM selection guide
ELPIDA DDR3 User
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PDF
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EDJ1108DBSE
Abstract: EDJ1116DBSE-DJ-F EDJ1108DBSE-GN-F EDJ1116DBSE EDJ1108DBSE-DJ-F EDJ1116DBSE-GN-F ELPIDA DDR3 EDJ1108 EDJ1116DBSE-DJ 78-Ball
Text: DATA SHEET 1G bits DDR3 SDRAM EDJ1108DBSE 128M words x 8 bits EDJ1116DBSE (64M words × 16 bits) Specifications Features • Density: 1G bits • Organization 16M words × 8 bits × 8 banks (EDJ1108DBSE) 8M words × 16 bits × 8 banks (EDJ1116DBSE)
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Original
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EDJ1108DBSE
EDJ1116DBSE
EDJ1108DBSE)
EDJ1116DBSE)
78-ball
96-ball
1600Mbps/1333Mbps
EDJ1108DBSE
EDJ1116DBSE-DJ-F
EDJ1108DBSE-GN-F
EDJ1116DBSE
EDJ1108DBSE-DJ-F
EDJ1116DBSE-GN-F
ELPIDA DDR3
EDJ1108
EDJ1116DBSE-DJ
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PDF
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ELPIDA DDR3
Abstract: EDJ2116DEBG-DJ-F EDJ2108DEBG-GN bc4 bt ELPIDA DDR3 2G ELPIDA DDR3 User
Text: PRELIMINARY DATA SHEET 2G bits DDR3 SDRAM EDJ2108DEBG 256M words x 8 bits EDJ2116DEBG (128M words × 16 bits) Specifications Features • Density: 2G bits • Organization: 32M words × 8 bits × 8 banks (EDJ2108DEBG) 16M words × 16 bits × 8 banks (EDJ2116DEBG)
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EDJ2108DEBG
EDJ2116DEBG
EDJ2108DEBG)
EDJ2116DEBG)
78-ball
96-ball
1600Mbps/1333Mbps
ELPIDA DDR3
EDJ2116DEBG-DJ-F
EDJ2108DEBG-GN
bc4 bt
ELPIDA DDR3 2G
ELPIDA DDR3 User
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EDJ2116DEBG-DJ-F
Abstract: edj2116debg EDJ2116DEBG-GN-F ELPIDA DDR3 EDJ2108DEBG ELPIDA DDR3 2G
Text: PRELIMINARY DATA SHEET 2G bits DDR3 SDRAM EDJ2108DEBG 256M words x 8 bits EDJ2116DEBG (128M words × 16 bits) Specifications Features • Density: 2G bits • Organization: 32M words × 8 bits × 8 banks (EDJ2108DEBG) 16M words × 16 bits × 8 banks (EDJ2116DEBG)
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EDJ2108DEBG
EDJ2116DEBG
EDJ2108DEBG)
EDJ2116DEBG)
78-ball
96-ball
1600Mbps/1333Mbps
EDJ2116DEBG-DJ-F
edj2116debg
EDJ2116DEBG-GN-F
ELPIDA DDR3
EDJ2108DEBG
ELPIDA DDR3 2G
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET 512M bits DDR3 SDRAM EDJ5316DBBG 32M words x 16 bits Specifications Features • Density: 512M bits • Organization: 4M words × 16 bits × 8 banks • Package: 96-ball FBGA Lead-free (RoHS compliant) and Halogen-free • Power supply: VDD, VDDQ = 1.5V ± 0.075V
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EDJ5316DBBG
96-ball
1600Mbps/1333Mbps/1066Mbps
M01E0706
E1462E20
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PDF
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EDJ1108DBSE
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET 1G bits DDR3 SDRAM EDJ1108DBSE 128M words x 8 bits EDJ1116DBSE (64M words × 16 bits) Specifications Features • Density: 1G bits • Organization ⎯ 16M words × 8 bits × 8 banks (EDJ1108DBSE) ⎯ 8M words × 16 bits × 8 banks (EDJ1116DBSE)
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EDJ1108DBSE
EDJ1116DBSE
EDJ1108DBSE)
EDJ1116DBSE)
78-ball
96-ball
1600Mbps/1333Mbps/1066Mbps/800Mbps
EDJ1108DBSE
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PDF
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ELPIDA DDR3
Abstract: DDR3 jedec
Text: PRELIMINARY DATA SHEET 512M bits DDR3 SDRAM EDJ5316DBBG 32M words x 16 bits Specifications Features • Density: 512M bits • Organization: 4M words × 16 bits × 8 banks • Package: 96-ball FBGA Lead-free (RoHS compliant) and Halogen-free • Power supply: VDD, VDDQ = 1.5V ± 0.075V
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EDJ5316DBBG
96-ball
1600Mbps/1333Mbps/1066Mbps
M01E0706
E1462E30
ELPIDA DDR3
DDR3 jedec
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PDF
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bc4 bl4 bl8 otf
Abstract: srt 8n TI ddr3 controller "DDR3 SDRAM" TI ddr3 controller datasheet T145
Text: DDR3 SDRAM Device Operation DDR3 SDRAM DDR3 SDRAM Specification Device Operation & Timing Diagram February 2009 revision 0.63 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE
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Untitled
Abstract: No abstract text available
Text: AS4C256M16D3 Revision History AS4C256M16D3 - 96-ball FBGA PACKAGE Revision Rev 1.0 Rev 2.0 Details Preliminary datasheet Amended temperature range to Table 2. Ordering Information - page 1 - Commercial Extended (0 ~ 95°C) - Industrial (-40 ~ 95°C) Date
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AS4C256M16D3
AS4C256M16D3
96-ball
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Untitled
Abstract: No abstract text available
Text: AS4C128M16D3 2Gb 128M x 16 bit DDR3 Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 1.0, Feb. /2014) Features Overview • JEDEC Standard Compliant Power supplies: VDD & VDDQ = +1.5V 0.075V Operating temperature: - Commercial (0 ~ 95°C)
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AS4C128M16D3
800MHz
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Untitled
Abstract: No abstract text available
Text: AS4C256M8D3 Revision History AS4C256M8D3 - 78-ball FBGA PACKAGE Revision Rev 1.0 Rev 2.0 Details Preliminary datasheet Amended temperature range to Table 2. Ordering Information - page 1 - Commercial Extended (0 ~ 95°C)- Industrial (-40 ~ 95°C) Date February 2014
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AS4C256M8D3
AS4C256M8D3
78-ball
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Untitled
Abstract: No abstract text available
Text: AS4C128M16D3 REVISION HISTORY Revision Rev. 1.0 Rev. 2.0 Confidential Description Initial Issue Typing error – in Table 2 page 2 – incorrect temperature range amended to: - Commercial 0 ~ 95°C - Industrial (-40 ~ 95°C) 1 Rev. 2.0 Issue Date February 2014
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AS4C128M16D3
800MHz
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PDF
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Untitled
Abstract: No abstract text available
Text: 2Gb DDR3L – AS4C256M8D3L 256M x 8 bit DDR3L Synchronous DRAM SDRAM Confidential Advanced (Rev. 1.0, April. /2014) Features Overview • JEDEC Standard Compliant Power supplies: VDD & VDDQ = +1.35V Backward compatible to VDD & VDDQ = 1.5V ±0.075V
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AS4C256M8D3L
800MHz
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AS4C256M16D3
Abstract: No abstract text available
Text: AS4C256M16D3 Revision History AS4C256M16D3 - 96-ball FBGA PACKAGE Revision Rev 1.0 Rev 2.0 Rev 3.0 Details Preliminary datasheet Typo in Table 2 – incorrect part no. page 2 Updated Table 11. Recommended DC Operating Conditions – page 21 Added CL=5 & CL=6 to Table 18 – page 26
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AS4C256M16D3
AS4C256M16D3
96-ball
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PDF
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Untitled
Abstract: No abstract text available
Text: AS4C256M8D3 2 Gb 256M x 8 bit DDR3 Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 1.0, Feb. /2014) Features Overview • JEDEC Standard Compliant Power supplies: VDD & VDDQ = +1.5V 0.075V Operating temperature: - Commercial (0 ~ 95°C)
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AS4C256M8D3
667/800MHz
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PDF
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Untitled
Abstract: No abstract text available
Text: AS4C512M8D3 4Gb 512M x 8 bit DDR3 Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 1.0, Feb. /2014) Features Overview • JEDEC Standard Compliant Power supplies: VDD & VDDQ = +1.5V 0.075V Operating temperature: - Commercial (0 ~ 95°C) - Industrial (-40 ~ 95°C)
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AS4C512M8D3
800MHz
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PDF
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Untitled
Abstract: No abstract text available
Text: 2Gb DDR3L – AS4C128M16D3L 128M x 16 bit DDR3L Synchronous DRAM SDRAM Confidential Advanced (Rev. 1.0, April. /2014) Features Overview • JEDEC Standard Compliant Power supplies: VDD & VDDQ = 1.35V Backward compatible to VDD & VDDQ = 1.5V ±0.075V
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AS4C128M16D3L
800MHz
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PDF
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AS4C128M16D3L
Abstract: No abstract text available
Text: 2Gb DDR3L – AS4C128M16D3L Revision History AS4C128M16D3L - 96-ball FBGA PACKAGE Revision Rev 1.0 Rev 2.0 Details Preliminary datasheet Added "Backward compatible to VDD & VDDQ = 1.5V +/0.075V" - page 2 Updated Table 12. Recommended DC Operating Conditions – page 21
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AS4C128M16D3L
AS4C128M16D3L
96-ball
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PDF
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AS4C128M16D3
Abstract: No abstract text available
Text: AS4C128M16D3 REVISION HISTORY AS4C128M16D3 – 96-ball FBGA PACKAGE Revision Rev. 1.0 Rev. 2.0 Rev 3.0 Confidential Description Initial Issue Typing error – in Table 2 page 2 – incorrect temperature range amended to: - Commercial Extended (0 ~ 95°C)
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AS4C128M16D3
96-ball
AS4C128M16D3
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PDF
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