XAPP029
Abstract: XAPP029V bcd binary conversion application note bcd to binary converter X5313 bcd binary conversion application BCD to Binary XC3000A XC3100A binary bcd conversion
Text: Serial Code Conversion between BCD and Binary XAPP 029.000 Application Note By PETER ALFKE and BERNIE NEW Summary Binary-to-BCD and BCD-to-binary conversions are performed between serial binary values and parallel BCD values. Xilinx Family Demonstrates
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XC3000A
XC3100A
X5298
X5313
X3392
XAPP029
XAPP029V
bcd binary conversion application note
bcd to binary converter
X5313
bcd binary conversion application
BCD to Binary
XC3100A
binary bcd conversion
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bcd binary conversion application note
Abstract: binary bcd conversion binary bcd conversion application note bcd to binary converter bcd adder bcd to arithmetic conversion XAPP029 bcd binary conversion application bcd arithmetic XAPP
Text: APPLICATION NOTE Serial Code Conversion between BCD and Binary XAPP 029 October 27, 1997 Version 1.1 Application Note by Peter Alfke and Bernie New Summary Binary-to-BCD and BCD-to-binary conversions are performed between serial binary values and parallel BCD values.
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XC3000A
XC3100A
X3082
X5313
X3392
bcd binary conversion application note
binary bcd conversion
binary bcd conversion application note
bcd to binary converter
bcd adder
bcd to arithmetic conversion
XAPP029
bcd binary conversion application
bcd arithmetic
XAPP
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MC14527B
Abstract: MC14527Bs "MOTOROLA CMOS LOGIC DATA" MC14527 MC14XXXBCL MC14XXXBCP MC14XXXBDW 066ns BCD Rate Multiplier
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14527B BCD Rate Multiplier The MC14527B BCD rate multiplier DRM provides an output pulse rate based upon the BCD input number. For example, if 6 is the BCD input number, there will be six output pulses for every ten input pulses. This part
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MC14527B
MC14527B
MC14527B/D*
MC14527B/D
MC14527Bs
"MOTOROLA CMOS LOGIC DATA"
MC14527
MC14XXXBCL
MC14XXXBCP
MC14XXXBDW
066ns
BCD Rate Multiplier
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C14527B BCD R ate M ultiplier The MC14527B BCD rate multiplier DRM provides an output pulse rate based upon the BCD input number. For example, if 6 is the BCD input number, there will be six output pulses for every ten input pulses. This part
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C14527B
MC14527B
MC14527B/D
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74F582
Abstract: bcd arithmetic binary bcd conversion N74F582D N74F582N binary to bcd
Text: FAST 74F582 4-Bit BCD Arithmetic Logic Unit Product Specification FAST Products FEATURES TYPE The 'F582 input and output logic in cludes a C arry/B orrow w hich is generat ed internally in the look-ahead mode, allowing BCD arithm etic to be com puted directly. For more than one BCD de
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24-pin
300mil
F582s.
500ns
74F582
bcd arithmetic
binary bcd conversion
N74F582D
N74F582N
binary to bcd
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TC4527BP
Abstract: No abstract text available
Text: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4527BP TC4527BP BCD RATE MUL T I P L I E R TC452 7BP is BCD rate multiplier from which arbi trary number of output pulses determined by BCD inputs Ain through Djyj can be obtained by supplying ten clock inputs.
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TC4527BP
TC4527BP
TC452
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TC4527BP
Abstract: No abstract text available
Text: TC4527BP C 2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4527BP BCD RATE M U L T I P L I E R TC4527BP is BCD rate multiplier from which arbi trary number of output pulses determined by BCD inputs Ain through D j n can be obtained by supplying ten
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TC4527BP
TC4527BP
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Untitled
Abstract: No abstract text available
Text: HEF4527B MSI BCD RATE MULTIPLIER The HEF4527B is a BCD rate multiplier with two buffered rate outputs O' and 0-), two buffered terminal count outputs (TC and TC), four BCD rate select inputs (S/^, Sg, Sq , Sq ), a common clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input (STR), a
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HEF4527B
HEF4527B
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bin2BCD16
Abstract: bcd binary conversion application note AVR204 binary bcd conversion 0938A-A bcd arithmetic BCD2bin16 binary to bcd conversion 16 bits 16 bit binary bcd conversion bcd adder
Text: AVR204: BCD Arithmetics Features Introduction • Conversion 16 Bits ↔ 5 Digits, This application note lists routines for BCD arithmetics. A listing of all implementations with key performance specifications is given in Table 1. 8 Bits ↔ 2 Digits • 2-Digit Addition and Subtraction
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AVR204:
16-bit
AVR204
bin2BCD16
bcd binary conversion application note
AVR204
binary bcd conversion
0938A-A
bcd arithmetic
BCD2bin16
binary to bcd conversion 16 bits
16 bit binary bcd conversion
bcd adder
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HEF4527BP
Abstract: HEF4527BT HEF4527B HEF4527BD
Text: HEF4527B MSI BCD RATE MULTIPLIER The HEF4527B is a BCD rate multiplier with two buffered rate outputs 0-| and 0-| , two buffered terminal count outputs (TC and TC), four BCD rate select inputs (S/^, Sg, S q , S p ), a common clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input (ST R ), a
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HEF4527B
7z84385
7z84384
HEF4527BP
HEF4527BT
HEF4527BD
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"binary to bcd"
Abstract: binary to BCD
Text: FAST 74F582 Signollct Document No. 853-1247 ECN No. 99495 Date of issue April 27,1990 Status Product Specification 4-Bit BCD Arithmetic Logic Unit FAST Products TYPE FEATU RES • Psrform s fo u r BCD functions • P and 5 o utputs for high speed expansion
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74F582
74F582
"binary to bcd"
binary to BCD
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82S82
Abstract: 74182 pin diagram 74182 binary to BCD 8421 binary bcd conversion logic diagram bcd adder binary bcd conversion N82S82N N82S82F bcd arithmetic
Text: DESCRIPTION The 82S82 binary coded BCD arithmetic unit is a high speed Schottky MSI circuit with lookahead carry/borrow that has been de signed for easy systems usage. Depending on the state of the add / subtract control line, the unit produces the BCD sum or difference
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82S82
74182 pin diagram
74182
binary to BCD 8421
binary bcd conversion logic diagram
bcd adder
binary bcd conversion
N82S82N
N82S82F
bcd arithmetic
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DIV12
Abstract: DIV41 BBC STa ADIX
Text: MITSUBISHI MICROCOMPUTERS 740 Family Reference Programs 4.8 BCD 12-digit Floating Point Arithmetic Calculations 1 Description Arithmetic calculations for BCD 12-digit floating point numbers are performed. (2) Explanation The data format, as shown below, consists of two sections: the mantissa (7 bytes: 1 byte of sign bit,
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ADSB10
ADSB11:
DIV12
DIV41
BBC STa
ADIX
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bcd to arithmetic conversion
Abstract: No abstract text available
Text: f/WÀNational d it Semiconductor 54F/74F582 4-Bit BCD Arithmetic Logic Unit General Description Features The 'F582 ¡s a 24-pin expandable Arithmetic Logic Unit ALU that performs two arithmetic operations (A plus B, A minus B), compare (A equals B), and binary to BCD conver
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54F/74F582
24-pin
82S82.
24-Lead
bcd to arithmetic conversion
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Untitled
Abstract: No abstract text available
Text: CM 00 IO EH ÆM National Semiconductor 54F/74F582 4-Bit BCD Arithmetic Logic Unit General Description Features The 'F582 is a 24-pin expandable Arithmetic Logic Unit ALU that performs two arithmetic operations (A plus B, A minus B), compare (A equals B), and binary to BCD conver
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54F/74F582
24-pin
82S82.
24-Lead
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DAC with BCD input
Abstract: stel max 161 diagram download STEL-1176 DAC with BCD inputs CX20201A-1 STEL-1376
Text: STEL-1376 Data Sheet STEL-1376 8 3/4 Decade Resolution BCD/Decimal Modulated Direct Digital Frequency Synthesizer R FEATURES • HIGH CLOCK FREQUENCY ■ ■ The STEL-1376 is a complete Decimal/BCD Direct Digital Frequency Synthesizer in a single DIL package
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STEL-1376
STEL-1376
STEL1376
STEL-1176
10-bit
CX20201A-1)
DAC with BCD input
stel max 161 diagram download
STEL-1176
DAC with BCD inputs
CX20201A-1
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"alu 4 bit"
Abstract: ALU 4-bit 100181F ecl 10K signetics fn 630 s
Text: 100181 Signetics ALU 4-Bit Binary/BCD ALU Preliminary Specification ECL Products DESCRIPTION The 100181 is a 4-bit Binary/BCD Arith metic Logic Unit which performs eight logic operations and eight arithmetic op erations on two 4-bit words. Arithmetic and logic operations are selected by a 4bit select input So, S 3 . The circuit
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740mVp-p
500ns
"alu 4 bit"
ALU 4-bit
100181F
ecl 10K signetics
fn 630 s
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95694
Abstract: binary to bcd conversion binary to BCD
Text: 582 National ÆÆ Semiconductor 54F/74F582 4-Bit BCD Arithmetic Logic Unit General Description Features The 'F582 is a 24-pin expandable A rithm etic Logic Unit ALU th a t perform s tw o arithm etic o perations (A plus B, A m inus B), com pare (A equals B), and binary to BCD co nve r
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54F/74F582
24-pin
82S82.
24-Lead
95694
binary to bcd conversion
binary to BCD
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Untitled
Abstract: No abstract text available
Text: 582 54F/74F582 C onnection Diagrams 4-Bit BCD Arithmetic Logic Unit „2 Vcc A/S D escription B The ’F582 is a 24-pin expandable Arithm etic Logic Unit ALU that per forms two arithmetic operations (A plus B, A minus B), compare (A equals B), and binary to BCD conversion. In addition to a ripple carry output,
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54F/74F582
24-pin
82S82.
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Untitled
Abstract: No abstract text available
Text: CD4527BMS Semiconductor CMOS BCD Rate Multiplier December 1992 Features Description • High Voltage Type 20V Rating CD4527BMS is a low power 4-bit digital rate multiplier that provides an output pulse rate which is the clock input pulse rate multiplied by 1/10 times the BCD input. For example,
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CD4527BMS
CD4527BMS
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CD4527BMS
Abstract: IOH15
Text: CD4527BMS CMOS BCD Rate Multiplier December 1992 Features Description • High Voltage Type 20V Rating CD4527BMS is a low power 4-bit digital rate multiplier that provides an output pulse rate which is the clock input pulse rate multiplied by 1/10 times the BCD input. For example,
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CD4527BMS
IOH15
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CD4527BMS
Abstract: IOH15
Text: CD4527BMS CMOS BCD Rate Multiplier December 1992 Features Description • High Voltage Type 20V Rating CD4527BMS is a low power 4-bit digital rate multiplier that provides an output pulse rate which is the clock input pulse rate multiplied by 1/10 times the BCD input. For example,
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IOH15
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MITSUBISHI ADC
Abstract: No abstract text available
Text: MITSUBISHI MICROCOMPUTERS 740 Family Reference Programs 3.8 16-Bit Data Add BCD (1) Description Addition of 16-bit BCD data is performed. (2) Explanation The contents of WORK00 +1 and WORK00 are added to the contents of WORK01 +1 and WORK01, respectively, and the results are stored to WORK00 +1 and WORK00, respectively.
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16-Bit
WORK00
WORK00
WORK01
WORK01,
WORK00,
MITSUBISHI ADC
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Untitled
Abstract: No abstract text available
Text: MITSUBISHI MICROCOMPUTERS 740 Family Reference Programs 3.9 16-Bit Subtract BCD (1) Description Subtraction of 16-bit BCD data is performed. (2) Explanation The contents of WORK01 +1 and WORK01 are subtracted from the contents of WORK00 +1 and WORK00, respectively, and the results are stored to WORK00 +1 and WORK00, respectively.
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WORK01
WORK01
WORK00
WORK00,
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