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    BUFFER MUX 232 Search Results

    BUFFER MUX 232 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation

    BUFFER MUX 232 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    SY58034U

    Abstract: SY58035U SY58036U SY58036UMI SY58036UMITR
    Text: Micrel Precision Edge SY58036U 6GHz, 1:6 400mV LVPECL FANOUT BUFFER w/2:1 MUX INPUT and INTERNAL TERMINATION Precision Edge™ SY58036U FEATURES • Provides six ultra-low skew copies of the selected input ■ 2:1 MUX input included for clock switchover


    Original     		PDF SY58036U 400mV 270ps 10psp-p SY58034U SY58035U SY58036U SY58036UMI SY58036UMITR

    Untitled

    Abstract: No abstract text available
    Text: Micrel Precision Edge SY58036U 6GHz, 1:6 400mV LVPECL FANOUT BUFFER w/2:1 MUX INPUT and INTERNAL TERMINATION Precision Edge™ SY58036U FEATURES • Provides six ultra-low skew copies of the selected input ■ 2:1 MUX input included for clock switchover


    Original     		PDF 400mV SY58036U 270ps 10psp-p

    atmel 424

    Abstract: AMBIT inverter atmel 545 ATMEL 340 crystal oscillator buffer Structure of D flip-flop DFFSR s051 crystal OAI222 CMOS Transmission gate Specifications Tri-State Buffer CMOS
    Text: Features • 0.5 µm Drawn Gate Length 0.45µm Leff Sea-of-Gates Architecture With Triple Level Metal • 3.3V Operation • 5.0V Compatible Input Buffers • On-chip Phase Locked Loop (PLL) Available to Synthesize Frequencies up to 150 MHz • • • •


    Original     		PDF ATL50 0753B 11/99/xM atmel 424 AMBIT inverter atmel 545 ATMEL 340 crystal oscillator buffer Structure of D flip-flop DFFSR s051 crystal OAI222 CMOS Transmission gate Specifications Tri-State Buffer CMOS

    Structure of D flip-flop DFFSR

    Abstract: AOI222 INV4 OAI23 atmel 424 MUX CMOS 0753B 5-input NAND Gates pic single phase inverter OAI22
    Text: ATL50 Features • • • • • • • • 0.5µm Drawn Gate Length 0.45µm Leff Sea-of-Gates Architecture With Triple Level Metal 3.3 Volt Operation 5.0 Volt compatible input buffers On-Chip Phase Locked Loop (PLL) Available to Synthesize Frequencies up to


    Original     		PDF ATL50 ATL50 Structure of D flip-flop DFFSR AOI222 INV4 OAI23 atmel 424 MUX CMOS 0753B 5-input NAND Gates pic single phase inverter OAI22

    QS53806

    Abstract: DRIVER16 LTC 433 16646AE PI3L500-AZFE PI5C162861B PI49FCT20802L PI49FCT20803L PI49FCT20803Q PI49FCT20807S
    Text: Pericom Semiconductor Corp. • 3545 North First St. • San Jose, CA 95134 • USA PRODUCT DISCONTINUANCE NOTIFICATION PDN PDN Number: 07-0501 Issue Date: May 29, 2007 Product(s) Affected: See attached file listing all affected products Alternative Supply Sources: N/A


    Original     		PDF PI5C6800CQE PI5L100LE PI5L100QE PI5L100WE PI5L102LE PI5L200LE PI5V330AWE QS53806 DRIVER16 LTC 433 16646AE PI3L500-AZFE PI5C162861B PI49FCT20802L PI49FCT20803L PI49FCT20803Q PI49FCT20807S

    PO61

    Abstract: ATMEL 340 atmel 424 ATLS60 ATL60 ttl buffer 3.6v Tri-State Buffer bga ambit inverter circuit AOI222 ATMEL 218
    Text: Features • • • • • • • • 0.6 µm Drawn Gate Length 0.5 µm Leff Sea-of-Gates Architecture with Triple Level Metal 5.0V, 3.3V and 2.0V Operation including Mixed Voltages On-chip Phase Locked Loop Available to Synthesize Frequencies up to 150 MHz and


    Original     		PDF ATL60 0388C 11/99/xM PO61 ATMEL 340 atmel 424 ATLS60 ttl buffer 3.6v Tri-State Buffer bga ambit inverter circuit AOI222 ATMEL 218

    3 to 8 bit decoder vhdl IEEE format

    Abstract: ATL60 ATLS60 PO61 ttl buffer
    Text: ATL60 Features x x x x x x x x 0.6Pm Drawn Gate Length 0.5Pm Leff Sea-of-Gates Architecture With Triple Level Metal 5.0 Volt, 3.3 Volt, and 2.0 Volt Operation Including Mixed Voltages On Chip Phase Locked Loop Available to Synthesize Frequencies up to 150 MHz and Manage Chip-to-Chip Clock Skew


    Original     		PDF ATL60 ATL60 3 to 8 bit decoder vhdl IEEE format ATLS60 PO61 ttl buffer

    TTL Schmitt-Trigger Inverters

    Abstract: Structure of D flip-flop DFFSR Tri-State Buffer CMOS TTL 3 input or gate ttl buffer TTL nand 3 input or gate 3 input Decoders actel PLL schematic AOI222
    Text: ATL60 Features • • • • • • • • 0.6µm Drawn Gate Length 0.5µm Leff Sea-of-Gates Architecture With Triple Level Metal 5.0 Volt, 3.3 Volt, and 2.0 Volt Operation Including Mixed Voltages On Chip Phase Locked Loop Available to Synthesize Frequencies up to


    Original     		PDF ATL60 ATL60 TTL Schmitt-Trigger Inverters Structure of D flip-flop DFFSR Tri-State Buffer CMOS TTL 3 input or gate ttl buffer TTL nand 3 input or gate 3 input Decoders actel PLL schematic AOI222

    Tri-State Buffer CMOS

    Abstract: PTS41 books schmitt trigger cmos buffer 8x buffer cmos ATL60 ATLS60 mux8n AOI222
    Text: ATL60 Features • • • • • • • • 0.6µm Drawn Gate Length 0.5µm Leff Sea-of-Gates Architecture With Triple Level Metal 5.0 Volt, 3.3 Volt, and 2.0 Volt Operation Including Mixed Voltages On Chip Phase Locked Loop Available to Synthesize Frequencies up to


    Original     		PDF ATL60 ATL60 Tri-State Buffer CMOS PTS41 books schmitt trigger cmos buffer 8x buffer cmos ATLS60 mux8n AOI222

    ATMEL 340

    Abstract: atmel atl atmel cpga ATL60 ATLS60 mux8n CERAMIC PIN GRID ARRAY 144 pins ambit inverter circuit AMBIT inverter ATMEL 218
    Text: Features • 0.6 µm Drawn Gate Length 0.5 µm Leff Sea-of-Gates Architecture with Triple-level Metal • 5.0V, 3.3V and 2.0V Operation including Mixed Voltages • On-chip Phase Locked Loop Available to Synthesize Frequencies up to 150 MHz and • • •


    Original     		PDF ATL60 0388D ATMEL 340 atmel atl atmel cpga ATLS60 mux8n CERAMIC PIN GRID ARRAY 144 pins ambit inverter circuit AMBIT inverter ATMEL 218

    vhdl code for 8-bit adder

    Abstract: verilog code for DFT hard disk serial ATA Atmel 826 debussy ATL35 vhdl code for flip-flop 8 bit risc microprocessor using vhdl vhdl code cisc processor NOR flash controller vhdl code
    Text: Features • • • • • Available in Gate Array or Embedded Array High-speed, 150 ps Gate Delay, 2-input NAND, FO = 2 nominal Up to 2.7 Million Used Gates and 976 Pins 0.35µ Geometry in up to Four-level Metal System-level Integration Technology – Cores: ARM7TDMI RISC Microprocessor; AVR RISC Microcontroller;


    Original     		PDF 0802F vhdl code for 8-bit adder verilog code for DFT hard disk serial ATA Atmel 826 debussy ATL35 vhdl code for flip-flop 8 bit risc microprocessor using vhdl vhdl code cisc processor NOR flash controller vhdl code

    PLL 2400 MHZ

    Abstract: No abstract text available
    Text: TLK1002 DUAL SIGNAL CONDITIONING TRANSCEIVER www.ti.com SLLS626 – SEPTEMBER 2004 • FEATURES • • • • • • • • • Fully Integrated Signal Conditioning Transceiver 1.0–1.3 Gbps Operation Low Power CMOS Design <300 mW High Differential Output Voltage Swing


    Original     		PDF TLK1002 SLLS626 24-Lead PLL 2400 MHZ

    sc371016

    Abstract: sae j2178 STANDARD b745 diode sae j1850 pwm transistor B633 1F42 a626 b731 transistor J1850 B744 transistor
    Text: Freescale Semiconductor Application Note AN1212/D Rev. 1, 11/2001 Freescale Semiconductor, Inc. J1850 Multiplex Bus Commmunication Using the MC68HC705C8 and the SC371016 J1850 Communications Interface JCI By Chuck Powers Multiplex Applications Introduction


    Original     		PDF AN1212/D J1850 MC68HC705C8 SC371016 J1850 J1850-Class sae j2178 STANDARD b745 diode sae j1850 pwm transistor B633 1F42 a626 b731 transistor B744 transistor

    atmel h 208

    Abstract: No abstract text available
    Text: A TL Features * 1.0 |i Drawn Gate Length High-performance CMOS Gate Arrays * All ATL Gate Arrays are Specified from 3.0 Volts to 5.5 Volts, for Standard and Low Voltage Applications * Design Translation of Existing ASIC Designs Provide for Easy Alternate Sourcing with Equivalent or Improved Performance


    OCR Scan     		PDF MIL-STD-883 MIL-STD-883 atmel h 208

    amd c-50

    Abstract: ATL100 ATL10C ATL130 ATL15C ATL160 ATL20 ATL20C ATL40 ATL60
    Text: ATL Features • 1.0 ji Drawn Gate Length High-performance CMOS Gate Arrays • All ATL Gate Arrays are Specified from 3.0 Volts to 5.5 Volts, for Standard and Low Voltage Applications • Design Translation of Existing ASIC Designs Provide for Easy Alternate Sourcing with Equivalent or Improved Performance


    OCR Scan     		PDF MIL-STD-883 0Q73CI3 amd c-50 ATL100 ATL10C ATL130 ATL15C ATL160 ATL20 ATL20C ATL40 ATL60

    Untitled

    Abstract: No abstract text available
    Text: ATL80 Features * 0.8 n drawn gate length combined with triple level metal provides outstanding speed/power performance * Design translation of existing ASIC, PLD and FPGA designs provide for easy alternate sourcing with equivalent performance * All ATL80 arrays can operate at 5.0 volts and 3.3 volts for lowpower applications


    OCR Scan     		PDF ATL80 ATL80 MlL-STD-883

    amd c-50

    Abstract: atmel h 208 TTL 74xx
    Text: ATL Features • 1.0 n Drawn Gate Length High-performance CMOS Gate Arrays • All ATL Gate Arrays are Specified from 3.0 Volts to 5.5 Volts, for Standard and Low Voltage Applications • Design Translation of Existing ASIC Designs Provide for Easy Alternate Sourcing with Equivalent or Improved Performance


    OCR Scan     		PDF MIL-STD-883 at425 amd c-50 atmel h 208 TTL 74xx

    atmel 819

    Abstract: atmel h 208 atl80 atmel 823
    Text: ATL80 Features * 0.8 |i drawn gate length combined with triple level metal provides outstanding speed/power performance * Design translation of existing ASIC, PLD and FPGA designs provide for easy alternate sourcing with equivalent performance * All ATL80 arrays can operate at 5.0 volts and 3.3 volts for lowpower applications


    OCR Scan     		PDF ATL80 ATL80 MlL-STD-883 atmel 819 atmel h 208 atmel 823

    AOI222

    Abstract: P02B OAI222
    Text: ATL50 Features • • • • • • • • 0.5|.im Drawn Gate Length 0.45|am Left Sea-of-Gates Architecture With Triple Level Metal 3.3 Volt Operation 5.0 Volt compatible input buffers On-Chip Phase Locked Loop (PLL) Available to Synthesize Frequencies up to


    OCR Scan     		PDF ATL50 ATL50 AOI222 P02B OAI222

    PTS41

    Abstract: CMOS GATE ARRAY buf8
    Text: ATL60 Features • O.tHim Drawn Gate Length O.Stim Left Sea-of-Gates Architecture With Triple Level Metal • 5.0 Volt, 3.3 Volt, and 2.0 Volt Operation Including Mixed Voltages • On Chip Phase Locked Loop Available to Synthesize Frequencies up to 150 MHz and Manage Chlp-to-Chip Clock Skew


    OCR Scan     		PDF ATL60 ATL60 PTS41 CMOS GATE ARRAY buf8

    Atmel 434

    Abstract: Atmel 224 2H92 SF1411
    Text: Features • 0.8 n effective gate lengths 1.0 |i drawn combined with close metal spacing provides outstanding speed/power performance • There is no new software to learn with Atmel's flexible design system • Design translation of existing ASIC, PLD and FPGA designs


    OCR Scan     		PDF 0044D-10/91/5M Atmel 434 Atmel 224 2H92 SF1411

    Untitled

    Abstract: No abstract text available
    Text: ATL60 Features • • • • • • • • 0.6|.im D raw n G ate Length 0.5|im Left S e a -o f-G a te s A rch ite c tu re W ith T rip le Level M etal 5.0 V o lt, 3.3 V o lt, and 2.0 V o lt O p e ra tio n In c lu d in g M ixed V o lta g e s On C h ip P h ase Locked Loop A v a ila b le to S y n th e s ize F req u en cies up to


    OCR Scan     		PDF ATL60 ATL60

    Untitled

    Abstract: No abstract text available
    Text: Lattice GAL6002B Design Example 4 to 1 RS-232 Port Multiplexer INTRODUCTION The GAL6002B is the most versatile 24-pin PLD available today. Its FPLA architecture offers buried macrocells, D/E registers, programmable clocks and dedicated input pins which can be individually configured as latches or


    OCR Scan     		PDF GAL6002B RS-232 24-pin GAL6002Bâ

    ATMEL 708

    Abstract: MIL-STD-454L Atmel 434 SF1411 6822 TRANSISTOR equivalent 5 input nand gate atmel 206 CMOS GATE ARRAYs m38510 1076 ATL100
    Text: ju > j î o MB Features • 0.8 p. effective gate lengths (1.0 ^ drawn combined with close metal spacing provides outstanding speed/power performance • There is no new software to learn with Atmel's flexible design system • Design translation of existing ASIC, PLD and FPGA designs


    OCR Scan     		PDF 0044D-10/91/5M ATMEL 708 MIL-STD-454L Atmel 434 SF1411 6822 TRANSISTOR equivalent 5 input nand gate atmel 206 CMOS GATE ARRAYs m38510 1076 ATL100