IQ64BTQ100
Abstract: P005 IDS200 IQ320 p022 p041 p055 power transistor IQ32B IQ48 IQ64B
Text: IQ Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections • RapidConnect parallel interface for fast, incremental
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IEC 158-1 VDE 0660
Abstract: CA3DN22 CA2-DN40 ca2-Dn22 VDE 0660 iec 158-1 telemecanique CA2 ft 111 telemecanique IEC 158-1 CA3-DN22 CA2-DN 131 ca2dk22
Text: File 8501 February 1996 IEC INDUSTTRIAL CONTROL RELAYS Catalog CONTENTS Description Page General Information . 1 Control Relays CA2D and CA3D . 2-17
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8501CT9501
IEC 158-1 VDE 0660
CA3DN22
CA2-DN40
ca2-Dn22
VDE 0660 iec 158-1
telemecanique CA2 ft 111
telemecanique IEC 158-1
CA3-DN22
CA2-DN 131
ca2dk22
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1K x 8 static ram dip22
Abstract: EASE-AN-4050 uPD703128 ca2 dn 1319 uPD703129 transistors F6 DD52 transistor dd52 F12a U15839EE1V0UM00 upD70312
Text: Preliminary User’s Manual TM V850E/CA2 JUPITER 32-/16-bit Romless Microcontroller Hardware µPD703128, µPD703129 Document No. U15839EE1V0UM00 Date Published August 2003 NEC Corporation 2003 Printed in Germany NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
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V850E/CA2
32-/16-bit
PD703128,
PD703129
U15839EE1V0UM00
electricity6130
1K x 8 static ram dip22
EASE-AN-4050
uPD703128
ca2 dn 1319
uPD703129
transistors F6 DD52
transistor dd52
F12a
U15839EE1V0UM00
upD70312
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Untitled
Abstract: No abstract text available
Text: PSX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Programmable Bus Widths of 4, 8, 16 and 32 bits — Identical and Predictable Delays — One-to-One, One-to-Many and Many-to-One Connections
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133MHz
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p055 TRANSISTOR
Abstract: p055 power transistor Bus repeater
Text: PSX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Programmable Bus Widths of 4, 8, 16 and 32 bits — Identical and Predictable Delays The PSX160, PSX128B and PSX96B are SRAM-based bus
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133MHz
p055 TRANSISTOR
p055 power transistor
Bus repeater
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SLGSSTE32882-A04B
Abstract: DDR3U SLGSSTE32882 SLGSSTE32882-B04B DDR3L DDR3U-1333 ddr3 RDIMM pinout XLXX JESD79-3 RC10
Text: SLGSSTE32882 DDR3 Registering Clock Driver with Parity and Quad Chip Selects Features • 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity • Supports high density DDR3 modules • Quad Chip Selects • Supports 1.25V up to DDR3U-1333 , 1.35V (up to DDR3L-1333), and 1.5V (up to DDR3-1600)
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SLGSSTE32882
28-bit
26-bit
DDR3U-1333)
DDR3L-1333)
DDR3-1600)
176-TFBGA
000-0032882-10g
SLGSSTE32882-A04B
DDR3U
SLGSSTE32882
SLGSSTE32882-B04B
DDR3L
DDR3U-1333
ddr3 RDIMM pinout
XLXX
JESD79-3
RC10
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XLXX
Abstract: SSTE32882 dba1 SSTE32882HLB JESD8-11A
Text: DATASHEET 1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.35V and 1.5V VDD operation. All inputs are 1.35V and 1.5V CMOS compatible, except the
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SSTE32882HLB
28-bit
26-bit
SSTE32882Hd
32882HLB
SSTE32882HLB
XLXX
SSTE32882
dba1
JESD8-11A
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DDR3 rdimm pcb layout
Abstract: SSTE32882KA1 XLXX SSTE32882 407 MTS controller LX-XX
Text: DATASHEET Advanced Information SSTE32882KA1 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description application. By disabling unused outputs the power consumption is reduced. This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock
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SSTE32882KA1
28-bit
26-bit
SSTE32882HLBAKG
SSTE32882HLBAKG8
SSTE32882HLBBKG
SSTE32882HLBBKG8
SSTE32882KA1
19-Aug-2010
DDR3 rdimm pcb layout
XLXX
SSTE32882
407 MTS controller
LX-XX
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407 MTS controller
Abstract: XLXX JESD8-11A pinout DDR3-1333 DDR3 rdimm pcb layout
Text: DATASHEET Advanced Information SSTE32882KA1 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description application. By disabling unused outputs the power consumption is reduced. This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock
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SSTE32882KA1
28-bit
26-bit
32882KA1
SSTE32882KA1
407 MTS controller
XLXX
JESD8-11A
pinout DDR3-1333
DDR3 rdimm pcb layout
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cK 7201
Abstract: SSTE32882 SSTE32882HLB xlxx transistor DA3 307 qbba1 dba1 DDR3 layout DDR3 pcb layout DDR3L
Text: DATASHEET 1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.35V and 1.5V VDD operation. All inputs are 1.35V and 1.5V CMOS compatible, except the
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28-bit
26-bit
SSTE32882HLB
32882HLB
SSTE32882HLB
cK 7201
SSTE32882
xlxx
transistor DA3 307
qbba1
dba1
DDR3 layout
DDR3 pcb layout
DDR3L
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DDR3U
Abstract: DDR3U-1866 SLGSSTE32882 top 261 yn JESD79-3 dba1 DDR3L DDR3-2133 RC10 RC11
Text: SLGSSTE32882 DDR3 Registering Clock Driver with Parity and Quad Chip Selects Features • 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity • Supports high density DDR3 modules • Quad Chip Selects • Supports 1.25V up to DDR3U-1866 , 1.35V (up to DDR3L-1866), and 1.5V (up to DDR3-2133)
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SLGSSTE32882
28-bit
26-bit
DDR3U-1866)
DDR3L-1866)
DDR3-2133)
176-TFBGA
25hich
DDR3U
DDR3U-1866
SLGSSTE32882
top 261 yn
JESD79-3
dba1
DDR3L
DDR3-2133
RC10
RC11
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Untitled
Abstract: No abstract text available
Text: DATASHEET 1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.35V and 1.5V VDD operation. All inputs are 1.35V and 1.5V CMOS compatible, except the
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28-bit
26-bit
SSTE328n
32882HLB
SSTE32882HLB
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Untitled
Abstract: No abstract text available
Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is
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power5465056,
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Untitled
Abstract: No abstract text available
Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is
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P009
Abstract: 7624k p055 TRANSISTOR P019
Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is
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power65056,
P009
7624k
p055 TRANSISTOR
P019
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QUAD D FLIP-FLOP
Abstract: enable40 IQX320 P089 marking IQX128B IQX160 IQX240B p005 ab 48 tag 91 IQX320-10PB416 gc153
Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is
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AB P89 zener
Abstract: Zener diode MARKING P035 252 B34 ZENER DIODE Zener diode MARKING P044 ZENER diode p317 Zener Diode p047 p014 DD 127 D TRANSISTOR zener AF4 on semiconductor marking code P008
Text: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections • RapidConfigure parallel interface for fast, incremental
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Untitled
Abstract: No abstract text available
Text: DATASHEET 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.25V, 1.35V and 1.5V VDD operation. All inputs are 1.25,1.35V and 1.5V CMOS compatible, except the
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28-bit
26-bit
32882KB1
SSTE32882KB1
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SSTE32882KA1
Abstract: No abstract text available
Text: DATASHEET Advanced Information 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.25V, 1.35V and 1.5V VDD operation.
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28-bit
26-bit
32882KA1
SSTE32882KA1
SSTE32882KA1
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DDR3U
Abstract: SSTE32882 2yn1 DDR3 rdimm pcb layout SSTE32882KA1 DDR3U-1600 da-15 pinout dba1 DDR3 layout DDR3 pcb layout
Text: DATASHEET Advanced Information 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.25V, 1.35V and 1.5V VDD operation.
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28-bit
26-bit
32882KA1
SSTE32882KA1
DDR3U
SSTE32882
2yn1
DDR3 rdimm pcb layout
SSTE32882KA1
DDR3U-1600
da-15 pinout
dba1
DDR3 layout
DDR3 pcb layout
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SSTE32882KB1
Abstract: XLXX DDR3U-1600 QAA10 DDR3 rdimm pcb layout DDR3U QAA15
Text: DATASHEET 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.25V, 1.35V and 1.5V VDD operation. All inputs are 1.25,1.35V and 1.5V CMOS compatible, except the
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28-bit
26-bit
32882KB1
SSTE32882KB1
SSTE32882KB1
XLXX
DDR3U-1600
QAA10
DDR3 rdimm pcb layout
DDR3U
QAA15
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P057C
Abstract: P050C P052C P060C p055 power transistor P056C P062C P054C P005 p048
Text: " L # I-C u b e IQ Fam ily Data Sheet m F eatures D e s c r ip tio n • SRAM -based, in-system programmable The IQ family of SRAM -based bit-oriented switching devices is • Switch Matrix manufactured using 0.6|jm C M O S processes. T hese devices — Non-Blocking
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IQ64B-J84
IQ48-PQ80
IQ32B
IQ32B-TQ52
IQ64B
IQ32B
144PQ
144TQ
100TQ
P057C
P050C
P052C
P060C
p055 power transistor
P056C
P062C
P054C
P005
p048
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p055 TRANSISTOR
Abstract: P029H H27 j1 3009 transistor P239 P239 9 318 ITT ZPY ZPY 91 ITT P109t P104t P182C
Text: & 1-Cube IQ Family Data Sheet Description Features The IQ devices are designed for use in switching and interconnect applications. In switching applications, these devices are used to dynamically switch one or more signals. When used in interconnect applications, the IQ devices
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3201/O
IQ32B
00D0b4b
p055 TRANSISTOR
P029H
H27 j1 3009
transistor P239
P239 9 318
ITT ZPY
ZPY 91 ITT
P109t
P104t
P182C
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RJP 3045
Abstract: Transistor z3p NP02 P104t str 1195 P022J I-CUBE iq P116C RP011 7805 v5
Text: M Ä ' I- C IQ Family Data Sheet u b e Features Description • Eight d evices ran gin g from 32 to 320 I / O Ports The IQ d evices are designed for use in sw itching and interconnect applications. In sw itching applications, these d evices are used to d ynam ically sw itch one or m ore signals. W hen
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2328-C
RJP 3045
Transistor z3p
NP02
P104t
str 1195
P022J
I-CUBE iq
P116C
RP011
7805 v5
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