RJJ0319DSP
Abstract: BCR8PM equivalent RJP30H2 N0201 rjj0319 NP109N055PUJ rjk5020 RJP30E2DPP NP75N04YUG lg washing machine circuit diagram
Text: 2012.01 Renesas Discrete General Catalog Transistor / Diode / Triac / Thyristor General Catalog www.renesas.com Power MOSFETs Thyristors/TRIACs IGBTs Bipolar Transistors for Switching Amplification Transistors Product Numbers Applications Diodes What gives rise to this sort of encounter?
|
Original
|
PDF
|
R07CS0003EJ0200
RJJ0319DSP
BCR8PM equivalent
RJP30H2
N0201
rjj0319
NP109N055PUJ
rjk5020
RJP30E2DPP
NP75N04YUG
lg washing machine circuit diagram
|
HM10474
Abstract: 43583 HM10474-10
Text: HM10474-8,HM10474-10 1024-word x 4-bit Fully Decoded Random Access Memory The H M 10474 is E C L 10k compatible, 1024-words x 4-bit, read write, random access memory developed for high speed systems such as scratch pads and control/buffer storages. The fabrication process is the Hitachi's low capacitance, oxide
|
OCR Scan
|
PDF
|
HM10474-8
HM10474-10
1024-word
1024-words
HM10474
cerdip-24pin
HM10474-10
43583
|
2SC2100
Abstract: 12ID 2j 20T
Text: 5 /U 3 y N P N ie ?*5 /? l/7 ls-î& h 7 y 5 > Z SILICON NPN EPITAXIAL PLANAR TRANSISTC O 2.0~ 30 M Hzìf SSB « S * « * « O 2.0~30M H z SSB A pplications Linear High L o w Supply (fë«EES8Sffl ) Power V oltage Amplifier Use) • 2 8M Hz-C5 5 W (P E P « $ ffitJ
|
OCR Scan
|
PDF
|
28MHz
-28MHz
VCC-12
2SC2100
12ID
2j 20T
|
Untitled
Abstract: No abstract text available
Text: T O SH IB A TLP560J TOSHIBA PHOTOCOUPLER GaAs IRED & PHOTO-TRIAC TLP560J TRIAC DRIVER U nit in mm PROGRAMMABLE CONTROLLERS AC-OUTPUT MODULE 3 2 1 T l Tf IT SOLID STATE RELAY 3 TTJ—E 4 The TOSHIBA TLP560J consists of a photo-triac optically coupled to a gallium arsenide infrared em itting diode in a six lead plastic DIP
|
OCR Scan
|
PDF
|
TLP560J
TLP560J
100mA
UL1577,
E67349
2500Vac
2500Vrms
11-7A9
100Hz
|
Untitled
Abstract: No abstract text available
Text: ^EDI EDI88512VA-RP ELECTRONIC DESIGNS, INC 512Kx8Ruggedized Plastic Static Ram 512Kx8 Static RAM CMOS, Monolithic Features EDI's ruggedized plastic 512Kx8 SRAM allows the user to 512Kx8 bit CMOS Static capitalize on the cost advantage of using a plastic com po
|
OCR Scan
|
PDF
|
EDI88512VA-RP
512Kx8Ruggedized
512Kx8
50C/W
EDI88512VA-RP
|
CY7C199-25PC
Abstract: 2218 8 PIN DIP C19S 7C199-15 7C199-20 7C199-25 CY7C199 CE12U
Text: St •ss CY7C199 CYPRESS 32K x 8 Static RAM Features Functional Description • High speed — 12 ns • Fast tj>oE T he CY7C199 is a high-perform ance CM OS static RAM organized as 32,768 words by 8 bits. Easy m em ory expansion is provided by an active LO W chip enable
|
OCR Scan
|
PDF
|
CY7C199
CY7C199
300-mil-wide
00239-B
CY7C199-25PC
2218 8 PIN DIP
C19S
7C199-15
7C199-20
7C199-25
CE12U
|
Untitled
Abstract: No abstract text available
Text: a iL R E L E A S E Final E le ctrica l S p e c ific a tio n s L i n t i A R LTC1344A . TECHNOLOGY Soft w a re -Se Ie c t a b Ie C a b le T erm inator February 1998 F€RTUR€S DCSCRIPTIOn • Software-Selectable Cable Termination for: RS232 V.28 RS423 (V.10)
|
OCR Scan
|
PDF
|
LTC1344A
RS232
RS423
RS422
RS485
RS449
EIA530
EIA530-A
|
Untitled
Abstract: No abstract text available
Text: r r u r LTC1343 m TECHNOLOGY S o ftw a re -S e le cta b le M u ltip ro to c o l Transceiver FCRTURCS D C S C R IP TIO n • Software-Selectable Transceiver Supports: RS232, RS449, EIA-530, EIA-530-A, V.35, V.36, X.21 ■ NET1 and NET2 Compliant ■ Software-Selectable Cable Termination Using
|
OCR Scan
|
PDF
|
LTC1343
RS232,
RS449,
EIA-530,
EIA-530-A,
LTC1344
LTC1343s
|
Nippon capacitors
Abstract: No abstract text available
Text: HB56AW1672E-A Series 16777216-word x 72-bit High Density Dynamic RAM Module HITACHI ADE-203-817A Z Rev. 1.0 Aug. 20, 1997 Description The HB56AW1672E-A belongs to 8-byte DIMM (Dual in-line Memory Module) family, and has been developed an optimized main memory solution for 4 and 8-byte processor applications. The
|
OCR Scan
|
PDF
|
HB56AW1672E-A
16777216-word
72-bit
ADE-203-817A
64-Mbit
HM5164400A)
16-bit
74LVT16244)
Nippon capacitors
|
Untitled
Abstract: No abstract text available
Text: u f m TECHNOLOGY Softw are-Selectable M ultiprotocol Transceiver August 1996 F€ O TUR€S D C S C R IP T IO n • Software-Selectable Transceiver Supports: RS232, RS449. EIA-530, EIA-530-A, V.35, V.36, X.21 ■ NET1 and NET2 Compliant ■ Software-Selectable Cable Termination Using
|
OCR Scan
|
PDF
|
RS232,
RS449.
EIA-530,
EIA-530-A,
LT1344
LTC1343s
RS449,
|
Nippon capacitors
Abstract: No abstract text available
Text: HB56UW1672E-A Series 16777216-word x 72-bit High Density Dynamic RAM Module HITACHI ADE-203-822A Z Rev. 1.0 Sep. 17, 1997 Description The HB56UW1672E-A belongs to 8-byte DIMM (Dual in-line Memory Module) family, and has been developed an optimized main memory solution for 4 and 8-byte processor applications. The
|
OCR Scan
|
PDF
|
HB56UW1672E-A
16777216-word
72-bit
ADE-203-822A
64-Mbit
HM5164405
16-bit
74LVT16244)
Nippon capacitors
|
Untitled
Abstract: No abstract text available
Text: S P S T SIGNAL PROCESSING TECHNOLOGIES P T 1 1 9 8-BIT, HIGH SPEED D/A CONVERTER FEATURES APPLICATIONS • 275 MWPS Conversion Rate - Version A • 165 MWPS Conversion Rate - Version B • Compatible with the HDAC10181 with Improved Performance • RS-343-A Compatible
|
OCR Scan
|
PDF
|
HDAC10181
RS-343-A
SPT1019AIN_
SPT1019BIN
|
Untitled
Abstract: No abstract text available
Text: fax id: 6138 CY7C373Ì C'i- UltraLogic 64-Macrocell Flash CPLD • Pin compatible with the CY7C374i Features Functional Description • 64 macrocells in four logic blocks • 64 I/O pins • 5 dedicated inputs including 4 clock pins • In-System Reprogrammable ISR™ Flash technology
|
OCR Scan
|
PDF
|
CY7C373Ì
64-Macrocell
CY7C374i
CY7C373i
FLASH370iTM
FLASH370i
22V10,
|
level shifter from TTL to CMOS
Abstract: ttl to cmos converter level shifter . CMOS to TTL cmos and ttl circuit design level shifter from TTL to CMOS bidirectional ttl cmos CD40116
Text: CD40116 Types CMOS High-Speed 8-Bit Bidirectional CMOS/TTL Interface Level Converter Features: • ■ E ight in ve rtin g channels with conversion from V n n to V c c o r Vq c to Vq d 4 V < V d d < 12 V a n d 4 V < \ ' c C < .V d d Three operating modes:
|
OCR Scan
|
PDF
|
CD40116
RCA-CD40116
l02-0
I09-II7
92CM-34547
CD40116H
level shifter from TTL to CMOS
ttl to cmos converter
level shifter . CMOS to TTL
cmos and ttl circuit design
level shifter from TTL to CMOS bidirectional
ttl cmos
|
|
|
Untitled
Abstract: No abstract text available
Text: THMY7232F0EG-80 TO SHIBA TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 33,554,432-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The TH M Y 7232F0EG is a 33,554,432-w ord by 72-bit synchronous dynam ic RAM m odule co n sistin g o f 18 TC59SM 704FT DRAM s and PLL /R egisters on a printed circuit board.
|
OCR Scan
|
PDF
|
THMY7232F0EG-80
432-WORD
72-BIT
7232F0EG
432-w
TC59SM
704FT
72-bit
|
TC59WM815BFT
Abstract: 674h AN 7580
Text: TOSHIBA THLD25N01 B70#75#80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 33,554,432-WORD BY 64-BIT DDR SYNCHRONOUS DRAM MODULE DESCRIPTION The THLD25N01B is a 33,554,432-word by 64-bit Double Data Rate synchronous dynamic RAM module consisting of 8 TC59WM815BFT DRAMs on a printed circuit board.
|
OCR Scan
|
PDF
|
THLD25N01
432-WORD
64-BIT
THLD25N01B
TC59WM815BFT
64-bit
674h
AN 7580
|
Untitled
Abstract: No abstract text available
Text: TOSHIBA THLD25N01 B70#75#80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 33,554,432-WORD BY 64-BIT DDR SYNCHRONOUS DRAM MODULE DESCRIPTION The THLD25N01B is a 33,554,432-word by 64-bit Double Data Rate synchronous dynamic RAM module consisting of 8 TC59WM815BFT DRAMs on a printed circuit board.
|
OCR Scan
|
PDF
|
THLD25N01
432-WORD
64-BIT
THLD25N01B
TC59WM815BFT
64-bit
|
7MBP25RU2A120
Abstract: marking code C1L 100DC AC2500 ED-4701 H04-004 HCPL-4504 MT5F12959 block diagram of electric cooker
Text: This m aterial and the inform ation herein is the p ro p e rty o f Fuji E lectric D evice Technology C o., Ltd. They shall be neither reproduced, copied .lent, or disclosed in any w ay w hatsoever for the use of any third party nor used fo r the m anufacturing purposes w ithou t the exp ress w ritte n consent of
|
OCR Scan
|
PDF
|
H04-004
7MBP25RU2A120
marking code C1L
100DC
AC2500
ED-4701
H04-004
HCPL-4504
MT5F12959
block diagram of electric cooker
|
Untitled
Abstract: No abstract text available
Text: Final Electrical Specifications LTC1343 S o ftw a re -S e le cta b le M u ltip ro to c o l Transceiver u im TECHNOLOGY O c to b e r 1996 F€flTUR€S DCSCRICTIOn • Software-Selectable Transceiver Supports: RS232, RS449, ElA-530, EIA-53Q-A, V.35, V.36, X.21
|
OCR Scan
|
PDF
|
LTC1343
RS232,
RS449,
ElA-530,
EIA-53Q-A,
LTC1343s
support32
RS485
LTC1334
RS232/RS485
|
Q20P010
Abstract: Q20M100 carry look ahead adder Q20080 Q20P025 Q20025 vernier Q20000 Q20004 Q20010
Text: D EV IC E SP EC IFIC A TIO N LOGIC ARRAYS Q20000 “TURBO” ECL/TTL Q20000 FEATURES Figure 6. Q20080 Die • • • • • • • • • • Up to 18,777 gates, channelless architecture 100 ps equivalent gate delays Low power 0.5-1.0 mW/gate 10K, 10KH, 10OK ECL and mixed ECL/TTL capability
|
OCR Scan
|
PDF
|
Q20000
Q20000
0Q03RL
Q20P010
Q20M100
carry look ahead adder
Q20080
Q20P025
Q20025
vernier
Q20004
Q20010
|
Untitled
Abstract: No abstract text available
Text: 1 MU9C3480L LANCAM i M USIC S E M I C O N D U C T O R S ;T DRAFT DAT/ 11 DISTINCTIVE CHARACTERISTICS 256 x 64-bit CMOS Content-addressable Memory CAM with 16-bit I/O for compatibility with the MU9C5480L Dual configuration register set (Control, Segment Control, Mask Register 1, Address Register, and
|
OCR Scan
|
PDF
|
MU9C3480L
64-bit
16-bit
MU9C5480L
|
Untitled
Abstract: No abstract text available
Text: 1 MU9C 3480A LANCAM i M USIC S E M I C O N D U C T O R S ;T DRAFT DAT/ 11 DISTINCTIVE CHARACTERISTICS 256 x 64-bit CMOS Content-addressable Memory CAM with 16-bit I/O for compatibility with the MU9C5480 New faster compare speed of 70 ns. Dual configuration register set (Control, Segment
|
OCR Scan
|
PDF
|
64-bit
16-bit
MU9C5480
|
2480L
Abstract: No abstract text available
Text: APPLICATION BENEFITS DISTINCTIVE CHARACTERISTICS The 2048 x 64-bit LANCAM facilitates numerous operations: > > > > New speed grade allows processing of both DA and SA within 560 ns, equivalent to 111, 10 Base-T or 11,100 Base-T Ethernet ports Expanded powerful instruction set for any list
|
OCR Scan
|
PDF
|
64-bit
16-bit
2480L
|
