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    CLK 503 Search Results

    CLK 503 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S149AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S549FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / HTSSOP28 Visit Toshiba Electronic Devices & Storage Corporation
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    CLK 503 Price and Stock

    O-Z Gedney ECLK5036

    1/2 X 36 In Flex Cplg |Oz Gedney ECLK5036
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Newark ECLK5036 Bulk 1
    • 1 $680.45
    • 10 $635.83
    • 100 $554.02
    • 1000 $554.02
    • 10000 $554.02
    Buy Now

    O-Z Gedney ECLK5036SS

    1/2 X 36 In Flec Cplg Stn-Stl |Oz Gedney ECLK5036SS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Newark ECLK5036SS Bulk 1
    • 1 $787.11
    • 10 $735.5
    • 100 $640.88
    • 1000 $640.88
    • 10000 $640.88
    Buy Now

    CLK 503 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SN54HC166, SN74HC166 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS117B – DECEMBER 1982 – REVISED MAY 1997 description The ’HC166 parallel-in or serial-in, serial-out registers feature gated clock CLK, CLK INH inputs and an overriding clear (CLR) input. The


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    PDF SN54HC166, SN74HC166 SCLS117B 300-mil SN54HC166 SN74HC166 HC166 SZZU001B, SDYU001N,

    hsm2812

    Abstract: ANSI-644 ADA4937-2 AN-835 TC1-1-13M IEEE-1596 TC1-1-13M equivalent murata LTE band pass filter
    Text: 10 MHz Bandwidth, 640 MSPS Dual Continuous Time Sigma-Delta Modulator AD9267 FEATURES AVDD PDWNB PDWNA DRVDD LVDS DRIVERS OR±A VIN+A Σ-Δ MODULATOR VIN–A D3±A D0±A PLL_LOCKED VREF CFILT AD9267 PLLMULT4 PLLMULT3 PLLMULT2 PHASELOCKED LOOP CLK+ CLK– DCO±


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    PDF AD9267 CDMA2000, MO-220-VMMD-4 091707-C 64-Lead AD9267BCPZ1 AD9267EBZ1 D07773-0-7/09 hsm2812 ANSI-644 ADA4937-2 AN-835 TC1-1-13M IEEE-1596 TC1-1-13M equivalent murata LTE band pass filter

    Untitled

    Abstract: No abstract text available
    Text: 7672 12-Bit A/D Converter VREF AIN1 AIN2 2 1 24 + - 12-BIT DAC + - SUCCESSIVE APPROXIMATION REGISTER 12-BIT LATCH CONTROL LOGIC 23 VDD 22 VSS 21 BUSY 20 CS 19 RD 18 CLK OUT 17 CLK IN THREE-STATE OUTPUT DRIVERS CLOCK OSCILLATOR 3 4 11 12 13 16 AGND D11 D4 DGND


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    PDF 12-Bit

    TQ6122AM

    Abstract: TQ611 TQ6122-M 2291C DAC-IC lm337mt MC33071 TQ6122 TQ6122-D MC1403A
    Text: T R I Q U BLANK I N T A5 A4 A0 B0 S E M I C O N D U C T O R, I N C . B4 B5 TQ6122 A7 MSB A6 B6 B7 ECL INPUT BUFFERS MULTIPLEXER V SS (-5 V) D DGND CLK CLK BLANKING LOGIC Q BLANK D0 D4 D5 D6 D7 QBLANK Q0 Q4 Q5 Q6 Q7 + – MASTER LATCH Features BINARY-TO-N-OF-7


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    PDF TQ6122 TQ6122AM TQ611 TQ6122-M 2291C DAC-IC lm337mt MC33071 TQ6122 TQ6122-D MC1403A

    GAL20LV8ZD

    Abstract: GAL20LV8ZD-15QJ GAL20LV8ZD-25QJ GAL20V8
    Text: Specifications GAL20LV8ZD GAL20LV8ZD Low Voltage, Zero Power E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Compatible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices


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    PDF GAL20LV8ZD GAL20LV8ZD GAL20LV8ZD-15QJ GAL20LV8ZD-25QJ GAL20V8

    GAL20LV8ZD

    Abstract: GAL20LV8ZD-15QJ GAL20LV8ZD-25QJ GAL20V8
    Text: Specifications GAL20LV8ZD GAL20LV8ZD Low Voltage, Zero Power E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Compatible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices


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    PDF GAL20LV8ZD GAL20LV8ZD GAL20LV8ZD-15QJ GAL20LV8ZD-25QJ GAL20V8

    20L10

    Abstract: 20XV10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
    Text: Specifications GAL20XV10 GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output


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    PDF GAL20XV10 20L10 20XV10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10

    GAL20XV10B-10LP

    Abstract: 20L10 20XV10 GAL20XV10 GAL20XV10B-10LJ PAL12L10
    Text: Specifications GAL20XV10 GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output


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    PDF GAL20XV10 GAL20XV10B-10LP 20L10 20XV10 GAL20XV10 GAL20XV10B-10LJ PAL12L10

    16v8z

    Abstract: gal16v8z GAL16V8 GAL16V8Z-12QJ GAL16V8Z-12QP
    Text: GAL16V8Z GAL16V8ZD Zero Power E2CMOS PLD Functional Block Diagram Features I/CLK • ZERO POWER E2CMOS TECHNOLOGY — 100 A Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD — Input and Output Latching During Power Down


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    PDF GAL16V8Z GAL16V8ZD Tested/100% 100ms) Maximum125 16v8z gal16v8z GAL16V8 GAL16V8Z-12QJ GAL16V8Z-12QP

    JT-G703

    Abstract: 1N4148 1N914 AN-517 PE-65966 PE-65969 TXC-02050C HDB3 coding EQB-0
    Text: Proprietary TranSwitch Corporation Information for use Solely by its Customers MRT TXC-02050C DATA SHEET BLOCK DIAGRAM LINE SIDE TERMINAL SIDE EQB1 EQB0 LOW VAGC GNDA AGFIL RXLOS VCOC PLLC PNENB RXDIS + RP/RD HDB3 - RN Decoder clk + DI1 DI2 Equalization Network


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    PDF TXC-02050C TXC-02050C TXC-02050C-M TXC-02050C-MB JT-G703 1N4148 1N914 AN-517 PE-65966 PE-65969 HDB3 coding EQB-0

    GAL programmer schematic

    Abstract: 26CV12 GAL26CLV12 GAL26CLV12D-5LJ GAL26CLV12D-7LJ
    Text: GAL26CLV12 FEATURES Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5 ns Maximum Propagation Delay — Fmax = 200 MHz — 3.5 ns Maximum from Clock Input to Data Output — UltraMOS® Advanced CMOS Technology I/CLK INPUT RESET


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    PDF GAL26CLV12 26CV12 122X52) GAL26CLV12D: GAL programmer schematic GAL26CLV12 GAL26CLV12D-5LJ GAL26CLV12D-7LJ

    16V8Z

    Abstract: 16V8ZD K 2056 transistor GAL16V8 GAL16V8Z GAL16V8Z-12QJ GAL16V8Z-12QP XOR-2048
    Text: GAL16V8Z GAL16V8ZD Zero Power E2CMOS PLD Functional Block Diagram Features I/CLK • ZERO POWER E2CMOS TECHNOLOGY — 100µA Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD — Input and Output Latching During Power Down


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    PDF GAL16V8Z GAL16V8ZD 16V8Z 16V8ZD K 2056 transistor GAL16V8 GAL16V8Z GAL16V8Z-12QJ GAL16V8Z-12QP XOR-2048

    16V8Z

    Abstract: GAL16V8 GAL16V8Z GAL16V8Z-12QJ GAL16V8Z-12QP
    Text: GAL16V8Z GAL16V8ZD Zero Power E2CMOS PLD Functional Block Diagram Features I/CLK • ZERO POWER E2CMOS TECHNOLOGY — 100µA Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD — Input and Output Latching During Power Down


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    PDF GAL16V8Z GAL16V8ZD 16V8Z GAL16V8 GAL16V8Z GAL16V8Z-12QJ GAL16V8Z-12QP

    16L8* GAL

    Abstract: pin diagram of xor 16l8 JEDEC fuse 16v8z 2123 16 pin diagram gal programming specification K 2056 transistor GAL16V8 GAL16V8Z GAL16V8Z-12QJ
    Text: GAL16V8Z GAL16V8ZD Zero Power E2CMOS PLD Functional Block Diagram Features I/CLK • ZERO POWER E2CMOS TECHNOLOGY — 100µA Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD — Input and Output Latching During Power Down


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    PDF GAL16V8Z GAL16V8ZD 16L8* GAL pin diagram of xor 16l8 JEDEC fuse 16v8z 2123 16 pin diagram gal programming specification K 2056 transistor GAL16V8 GAL16V8Z GAL16V8Z-12QJ

    20XV10

    Abstract: 20L10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
    Text: Specifications GAL20XV10 GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES 2 I/CLK • HIGH PERFORMANCE E CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output


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    PDF GAL20XV10 20XV10 20L10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10

    S0-7803

    Abstract: 26v12 GAL26V12 TWL 3016 GAL26V12C-10LJ GAL26V12C-10LP GAL26V12C-15LJ GAL26V12C-20LP GAL26V12C-7LJ Pin Diagrams 7809
    Text: GAL26V12 High Performance E2CMOS PLD Generic Array LogicTM FEATURES FUNCTIONAL BLOCK DIAGRAM I/CLK 1 8 8 INPUT I/O/Q OLMC 2 I/O/Q 12 INPUT INPUT INPUT • PRELOAD AND POWER-ON RESET OF REGISTERS — 100% Functional Testability INPUT • APPLICATIONS INCLUDE:


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    PDF GAL26V12 S0-7803 26v12 GAL26V12 TWL 3016 GAL26V12C-10LJ GAL26V12C-10LP GAL26V12C-15LJ GAL26V12C-20LP GAL26V12C-7LJ Pin Diagrams 7809

    M16C450

    Abstract: M16550A baud rate generator vhdl
    Text: Inventra M16x50-B1 Enhanced 16550A-Compatible UART Serial Communications FPGA/CPLD IP D A T A S H E E T CLK RCLK RCLK_BAUD BAUD BAUD RATE GENERATOR M16x50 key features: • Compatible with Inventra™ BRGE M16C450 and M16550A UARTs FIFO A[2:0] TRANSMIT


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    PDF M16x50-B1 6550A-Compatible M16x50 M16C450 M16550A M16x50- PD-40128 001-FO baud rate generator vhdl

    GAL16V8

    Abstract: GAL16V8D GAL16V8D pin configuration 16l8 JEDEC fuse 16V8 GAL16V8D-10QJ GAL16V8D-10QP GAL16V8D-3LJ GAL16V8D-5LJ GAL16V8D-7LJ
    Text: GAL16V8 High Performance E2CMOS PLD Generic Array Logic Features Functional Block Diagram I/CLK • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 3.5 ns Maximum Propagation Delay — Fmax = 250 MHz — 3.0 ns Maximum from Clock Input to Data Output — UltraMOS® Advanced CMOS Technology


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    PDF GAL16V8 Tested/100% 100ms) GAL16V8 GAL16V8D GAL16V8D pin configuration 16l8 JEDEC fuse 16V8 GAL16V8D-10QJ GAL16V8D-10QP GAL16V8D-3LJ GAL16V8D-5LJ GAL16V8D-7LJ

    ci 7809

    Abstract: GAL26V12 TWL 3016 26V12 GAL26V12C-10LJ GAL26V12C-10LP GAL26V12C-15LJ GAL26V12C-20LJ GAL26V12C-20LP ci 7814
    Text: GAL26V12 High Performance E2CMOS PLD Generic Array LogicTM FEATURES FUNCTIONAL BLOCK DIAGRAM I/CLK 1 8 8 INPUT I/O/Q OLMC 2 I/O/Q 12 INPUT INPUT INPUT • PRELOAD AND POWER-ON RESET OF REGISTERS — 100% Functional Testability INPUT • APPLICATIONS INCLUDE:


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    PDF GAL26V12 ci 7809 GAL26V12 TWL 3016 26V12 GAL26V12C-10LJ GAL26V12C-10LP GAL26V12C-15LJ GAL26V12C-20LJ GAL26V12C-20LP ci 7814

    GAL20V8B

    Abstract: GAL20V8 gal 20v8 programming specification lattice GAL20V8 20V8 5962-8984004LA gal programming specification 05a10
    Text: GAL20V8/883 High Performance E2CMOS PLD Generic Array Logic Features Functional Block Diagram I/CLK • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 62.5 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 12 mA Outputs


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    PDF GAL20V8/883 24-pin MIL-STD-883 GAL20V8B-10LD/8832 5962-8984004LA 962-89840043A 28-Pin GAL20V8B-10LR/883 GAL20V8B GAL20V8 gal 20v8 programming specification lattice GAL20V8 20V8 5962-8984004LA gal programming specification 05a10

    ic 8155 block diagram

    Abstract: No abstract text available
    Text: Lattice Specifications GAL6002B fmax DESCRIPTIONS CLK CLK fm ax w ith External Feedback 1/ tsu+tco Note: fmax with external feedback is calculated from measured tsu and tco. 4- to -M 4- tpd- W


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    PDF GAL6002B GAL6001 800FASTGAL; ic 8155 block diagram

    16v8z

    Abstract: 16V8ZD
    Text: GAL16V8Z GAL16V8ZD I Semiconductor I Corporation Zero Power E2CMOS PLD l/CLK - > - ZERO POWER E2CMOS TECHNOLOGY — 100jjA Standby Current — Input Transition Detection on GAL16V8Z — Dedicated Power-down Pin on GAL16V8ZD — Input and Output Latching During Power Down


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    PDF GAL16V8Z GAL16V8ZD 100jjA GAL16V8ZD Tested/100% 100ms) 16v8z 16V8ZD

    Untitled

    Abstract: No abstract text available
    Text: GAL20XV10 Lattica High-Speed E2CMOS PLD Generic Array Logic Semiconductor Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES l/CLK □ - • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax =100 MHz — 7 ns Maximum from Clock Input to Data Output


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    PDF Tested/100% PAL12L10, 20L10, 20X10, GAL20XV10

    TQ1136-06M

    Abstract: TQ1136-12M d642
    Text: PRODUCT INFORMATION TriQuint Q-LOGIC 1:12 DEM ULTIPLEXER TQ 1136-12M T Q 1136-06M FEATURES 1.2 G bits/sec NRZ Data Rate TQ1I36-12M Fram e Shift C apability ECL-Compatible Inputs and Outputs Fully Compatible w ith TQ1135 M ultiplexer BLOCK DIAGRAM CLK Q -NCLK


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    PDF TQ1136-12M TQ1136-06M TQ1I36-12M) TQ1135 TQ1136 TQ1136-12M) TQ1136-06M) TQ1136-06M TQ1136-12M d642