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    CLOCK DRIVER DE-MUX WITH 2 OUTPUTS Search Results

    CLOCK DRIVER DE-MUX WITH 2 OUTPUTS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    LBAA0QB1SJ-295 Murata Manufacturing Co Ltd SX1262 MODULE WITH OPEN MCU Visit Murata Manufacturing Co Ltd
    GRJ43DR7LV224KW01K Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors with Soft Termination for General Purpose Visit Murata Manufacturing Co Ltd
    GRJ55DR7LV474KW01L Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors with Soft Termination for General Purpose Visit Murata Manufacturing Co Ltd
    GRJ55DR7LV334KW01K Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors with Soft Termination for General Purpose Visit Murata Manufacturing Co Ltd
    GRJ43QR7LV154KW01L Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors with Soft Termination for General Purpose Visit Murata Manufacturing Co Ltd

    CLOCK DRIVER DE-MUX WITH 2 OUTPUTS Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: PCA8561 Automotive 18 x 4 LCD segment driver Rev. 1 — 9 September 2014 Objective data sheet 1. General description PCA8561 is an ultra low-power LCD segment driver with 4 backplane- and 18 segment-driver outputs, with either an I2C- or an SPI-bus interface. It comprises an


    Original     		PCA8561 PCA8561 AEC-Q100 PDF

    8864 AN

    Abstract: No abstract text available
    Text: EM MICROELCTRONIC-MARIN SA V6123 Digitally Programmable 2, 4 and 8 Mux LCD Driver Features n n n n n n n n n n n n n n n n Typical Operating Conditions Very simple 1-bit interface see Fig. 1 V6123 mux mode 2 with 2 rows and 58 columns V6123 mux mode 4 with 4 rows and 56 columns


    Original     		V6123 V6123 B/268 8864 AN PDF

    Untitled

    Abstract: No abstract text available
    Text: DS42MB100 www.ti.com SNLS244F – SEPTEMBER 2006 – REVISED AUGUST 2010 DS42MB100 4.25 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization Check for Samples: DS42MB100 FEATURES DESCRIPTION • • • • • • • • • •


    Original     		DS42MB100 SNLS244F DS42MB100 WQFN-36 PDF

    obsai

    Abstract: MARKING DIAGRAMS sob
    Text: DS42MB100 www.ti.com SNLS244G – SEPTEMBER 2006 – REVISED APRIL 2013 DS42MB100 4.25 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization Check for Samples: DS42MB100 FEATURES DESCRIPTION • • • • • • • • • •


    Original     		DS42MB100 SNLS244G DS42MB100 WQFN-36 obsai MARKING DIAGRAMS sob PDF

    Motorola 68030

    Abstract: H644 DL122 H640 MC100H644 MC10H644
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 68030/040 PECL-TTL Clock Driver MC10H644 MC100H644 The MC10H/100H644 generates the necessary clocks for the 68030, 68040 and similar microprocessors. The device is functionally equivalent to the H640, but with fewer outputs in a smaller outline 20–lead PLCC


    Original     		MC10H644 MC100H644 MC10H/100H644 DL122 MC10H644/D* MC10H644/D Motorola 68030 H644 H640 MC100H644 MC10H644 PDF

    DS25MB100

    Abstract: No abstract text available
    Text: DS25MB100 www.ti.com SNLS243F – SEPTEMBER 2006 – REVISED FEBRUARY 2009 DS25MB100 2.5 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization Check for Samples: DS25MB100 FEATURES 1 • • • • • • • • • 2 2:1 multiplexer and 1:2 buffer


    Original     		DS25MB100 SNLS243F DS25MB100 LLP-36 PDF

    Untitled

    Abstract: No abstract text available
    Text: DS25MB100 www.ti.com SNLS243G – SEPTEMBER 2006 – REVISED APRIL 2013 DS25MB100 2.5 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization Check for Samples: DS25MB100 FEATURES DESCRIPTION • • • • • • • • • •


    Original     		DS25MB100 SNLS243G DS25MB100 WQFN-36 PDF

    10H644

    Abstract: plcc20 socket MC10H644FN
    Text: MC10H644, MC100H644 68030/040 PECL to TTL Clock Driver The MC10H/100H644 generates the necessary clocks for the 68030, 68040 and similar microprocessors. The device is functionally equivalent to the H640, but with fewer outputs in a smaller outline 20−lead PLCC package. It is guaranteed to meet the clock


    Original     		MC10H644, MC100H644 MC10H/100H644 20-lead 10H644 plcc20 socket MC10H644FN PDF

    abstract for "metal detector"

    Abstract: Q0455 tdi ccd CAS-6254 focal plane array cte table metal detector circuit diagram Ford Aerospace 64 to 4 Mux KS-127
    Text: 3667320 FORD AEROSP, AERONUTRONIC FOR» AER0SP-. AERONUTRONIC 97D 00455 D T-4/-55 T? Dlfj3t.L,73ED ODDDMSS ^ J T Advanced C C D Reconnaissance Detector A. Lareau E - 0 Systems C A I, a Division of R EC O N /O PTIC A L, INC. 550 W. Northwest Highway Barrington, IL 60010


    OCR Scan     		Q0455 CAS-6254 S-6254 ab7350 00D04bD abstract for "metal detector" tdi ccd focal plane array cte table metal detector circuit diagram Ford Aerospace 64 to 4 Mux KS-127 PDF

    Untitled

    Abstract: No abstract text available
    Text: ec N o ew m m D e es n ig de ns d fo r XE8802 Sensing Machine Data Acquisition MCU with ZoomingADC and LCD driver XE8802 Sensing Machine Data Acquisition SoC with 16+10 bit ZoomingADC™ Embedded RISC controller and LCD driver General Description R The XE8802 includes a high resolution acquisition


    Original     		XE8802 PDF

    DFP 20 PIN to VGA diagram

    Abstract: dfp to vga Dvi CONNECTION DIAGRAM DFP 20 PIN to dvi diagram
    Text: CH7303 Chrontel Brief Datasheet CH7303 HDTV / DVI Encoder Features General Description • Digital Visual Interface DVI Transmitter up to 165M pixels/second • DVI low jitter PLL with Emission Reduction • DVI hot plug detection • Analog YPrPb outputs for HDTV


    Original     		CH7303 CH7303 16-bit DFP 20 PIN to VGA diagram dfp to vga Dvi CONNECTION DIAGRAM DFP 20 PIN to dvi diagram PDF

    DFP 20 PIN to VGA diagram

    Abstract: dfp to vga DVI demux RGB DAC dvi to dfp 26 dfp 20 pin to vga 15 pin DIAGRAM dfp 30 pin CH7303 dvi pinout DFP to DVI Dvi CONNECTION DIAGRAM
    Text: CH7303 Chrontel Brief Datasheet CH7303 HDTV / DVI Encoder Features 1.0 General Description • Digital Visual Interface DVI Transmitter up to 165M pixels/second • DVI low jitter PLL with Emission Reduction • DVI hot plug detection • Analog YPrPb outputs for HDTV


    Original     		CH7303 CH7303 16-bit 1080i 1080p DFP 20 PIN to VGA diagram dfp to vga DVI demux RGB DAC dvi to dfp 26 dfp 20 pin to vga 15 pin DIAGRAM dfp 30 pin dvi pinout DFP to DVI Dvi CONNECTION DIAGRAM PDF

    M21350-BRF-001-B

    Abstract: M21350 MINDSPEED m21355 express card DVB 424M SMPTE292M M21355 M21350 M21350 Heat Trace
    Text: > Product Overview The M21350 is a quad serial digital video reclocker with integrated trace equalization and automatic rate detect ARD circuitry. Each of the four reclocker channels features a 4:1 input mux. The device operates at SDI data rates ranging


    Original     		M21350 270Mbps 2970Mbps SMPTE292M, 270Mbps. 27MHz M21350-BRF-001-B MINDSPEED m21355 express card DVB 424M SMPTE292M M21355 M21350 M21350 Heat Trace PDF

    MC14499

    Abstract: MC14495 receiver in FTA mc26ls31 MC34055DW ULN2803 led display driver ULN2803 MC34142DW MC34050 binary to hex led display decoder
    Text: Interface Circuits In Brief . . . Page Enhanced Ethernet Transceiver . . . . . . . . . . . . . . . . . . 4.6–2 High Performance Decoder Driver/Sink Driver . . . . . . 4.6–3 ISO 8802–3[IEEE 802.3] 10BASE–T Transceiver . . . 4.6–3 Hex EIA–485 Transceiver with


    Original     		10BASE MC14499 MC14495 receiver in FTA mc26ls31 MC34055DW ULN2803 led display driver ULN2803 MC34142DW MC34050 binary to hex led display decoder PDF

    lvds FRC lcd

    Abstract: verilog code for lvds driver
    Text: OBSOLETE FPD87392AXA www.ti.com SNOSA80C – JUNE 2003 – REVISED APRIL 2013 FPD87392AXA +3.3V TFT-LCD Timing Controller with Dual LVDS Inputs/Dual RSDS Outputs for TFT-LCD Monitor and Notebook SXGA/SXGA+/UXGA Check for Samples: FPD87392AXA FEATURES


    Original     		FPD87392AXA SNOSA80C 1280x1024) 1400x1050) 1600x1200) lvds FRC lcd verilog code for lvds driver PDF

    AN 7591 POWER AMPLIFIER

    Abstract: creative home theater 2.1 circuit diagram
    Text: Integrated Mixed-Signal Solutions PRELIMINARY DATA SHEET STAC9766/67 Two-Channel AC’97 Codecs with Headphone Drive and SPDIF Output Data Sheet Revision 6.0 Not Recommended for New Designs. Please use the STAC9766/67 CC1 and beyond. Documentation available at www.sigmatel.com.


    Original     		STAC9766/67 STAC9766/67 2-9766-D1-6 0000h, AN 7591 POWER AMPLIFIER creative home theater 2.1 circuit diagram PDF

    PI90LVB16LE

    Abstract: VID-400 PI90LVB16
    Text: PI90LVB16


    Original     		PI90LVB16 PI90LVB16 300mV MO-153F/AD 24-Pin, 173-Mil PI90LVB16LE PS8536C PI90LVB16LE VID-400 PDF

    Untitled

    Abstract: No abstract text available
    Text: PI90LVB16


    Original     		PI90LVB16 PI90LVB16 24-Pin PI90LVB16L PS8536 PDF

    Untitled

    Abstract: No abstract text available
    Text: TEKTRONIX IN C / TRI ÚUINT SbE D • ÓTDÍaSlñ GD0Q3Ö0 T Q T R û T * 5 £ - l 5 le s a li ^ ' 9 a B i t L o g ic ÄB¥ÄM€E High Speed DRAM and SRAM Driver/Translator 10OMHZ Clock - 5 ns Delay Time 10G PicoLogic Family_ FEATURES 90 mA output capability for driving large


    OCR Scan     		10OMHZ 050P3 0080P PDF

    PI90LVB16

    Abstract: PI90LVB16L
    Text: PI90LVB16


    Original     		PI90LVB16 PI90LVB16 300mV 24-Pin PI90LVB16L PS8536A PI90LVB16L PDF

    ecl85

    Abstract: 10H644 H644 H640 MC100H644 MC100H644FN MC10H644 MC10H644FN PLCC20 package
    Text: MC10H644, MC100H644 68030/040 PECL to TTL Clock Driver The MC10H/100H644 generates the necessary clocks for the 68030, 68040 and similar microprocessors. The device is functionally equivalent to the H640, but with fewer outputs in a smaller outline 20–lead PLCC package. It is guaranteed to meet the clock


    Original     		MC10H644, MC100H644 MC10H/100H644 50MHz r14525 MC10H644/D ecl85 10H644 H644 H640 MC100H644 MC100H644FN MC10H644 MC10H644FN PLCC20 package PDF

    lcd 40 pin diagram lvds

    Abstract: lcd 30 pin diagram lvds CH7305 AN61 lvds 30 pin lcd panel lvds 20 pin to 30 pin chrontel an lvds 34 pin lcd
    Text: CH7305 Chrontel Brief Datasheet Chrontel CH7305 Single/Dual LVDS Transmitter Features 1.0 General Description • Single / Dual LVDS transmitter The CH7305 is a Display Controller device, which accepts a graphics data stream over one 12-bit wide variable voltage 1.1V to 3.3V port. The data stream outputs


    Original     		CH7305 CH7305 12-bit 24-bit 18-bit lcd 40 pin diagram lvds lcd 30 pin diagram lvds AN61 lvds 30 pin lcd panel lvds 20 pin to 30 pin chrontel an lvds 34 pin lcd PDF

    Untitled

    Abstract: No abstract text available
    Text: CH7305 Chrontel Brief Datasheet Chrontel CH7305 Single/Dual LVDS Transmitter Features General Description • Single / Dual LVDS transmitter The CH7305 is a Display Controller device, which accepts a graphics data stream over one 12-bit wide variable voltage 1.1V to 3.3V port. The data stream outputs


    Original     		CH7305 CH7305 12-bit 24-bit 18-bit PDF

    LVDS BT656 transmitter

    Abstract: LVDS24 LODA
    Text: CH7305 Chrontel Chrontel CH7305 Single/Dual LVDS Transmitter Features General Description • Single / Dual LVDS transmitter The CH7305 is a Display Controller device, which accepts a graphics data stream over one 12-bit wide variable voltage 1.1V to 3.3V port. The data stream outputs


    Original     		CH7305 CH7305 24-bit 18-bit 64-pin 12-bit LVDS BT656 transmitter LVDS24 LODA PDF