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    CMA1 S C12 Search Results

    CMA1 S C12 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74AC11086D Texas Instruments Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85 Visit Texas Instruments Buy
    74AC11244DW Texas Instruments Octal Buffers/Drivers 24-SOIC -40 to 85 Visit Texas Instruments Buy
    74AC11245DW Texas Instruments Octal Bus Transceivers 24-SOIC -40 to 85 Visit Texas Instruments Buy
    74AC16244DGGR Texas Instruments 16-Bit Buffers And Line Drivers With 3-State Outputs 48-TSSOP -40 to 85 Visit Texas Instruments Buy
    74ACT11000DR Texas Instruments Quadruple 2-Input Positive-NAND Gates 16-SOIC -40 to 85 Visit Texas Instruments Buy

    CMA1 S C12 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MOSFET B20 N03

    Abstract: A09 N03 MOSFET A42 BF 331 W01 SMD mosfet lt1093 1206A102 KAT2A AVX SRDSB10PC viper 22e RAS 05 e201 siliconix
    Text: OPTi Inc. OPTi 888 Tasman Drive Milpitas, CA 95035 408 486-8000 Fax: (408) 486-8001 Configuration Guide (Confidential) Product Name: Viper Xpress+ Debug Board Title: Debug Board Revision 0.0 Specification Date: January 21, 1997 Scope This document provides the specification, jumper list, rework


    Original     		PDF PSNT21# PSNT22# PSNT31# PSNT32# MOSFET B20 N03 A09 N03 MOSFET A42 BF 331 W01 SMD mosfet lt1093 1206A102 KAT2A AVX SRDSB10PC viper 22e RAS 05 e201 siliconix

    AT89LP51ED2

    Abstract: AT89LP ISP Studio interface TPS307 interfacing of 4KB RAM and 2KB ROM with 8051 XR-S200 AT89S8253 8051 interfacing to exeternal memory at89lp programmer intel 8051 microcontroller bootloader isp SM200
    Text: Features • 8-bit Microcontroller Compatible with 8051 Products • Enhanced 8051 Architecture – – – – – – – – • • • • • Single Clock Cycle per Byte Fetch 12 Clock per Machine Cycle Compatibility Mode Up to 20 MIPS Throughput at 20 MHz Clock Frequency


    Original     		PDF 16x16 AT89LP51ED2/ID2 512-byte AT89LP51ED2 AT89LP ISP Studio interface TPS307 interfacing of 4KB RAM and 2KB ROM with 8051 XR-S200 AT89S8253 8051 interfacing to exeternal memory at89lp programmer intel 8051 microcontroller bootloader isp SM200

    8051 PC keyboard CIRCUIT diagram atmel

    Abstract: AT89LP ISP Studio interface TI PLCC44 Watchdog AT89LP AT89LP51RC2 Delta dps 214 cp AT89LP51RC2-20JU AT89LP51ED2 PDIP40 PLCC44
    Text: Features • 8-bit Microcontroller Compatible with 8051 Products • Enhanced 8051 Architecture – – – – – – – – • • • • • Single Clock Cycle per Byte Fetch 12 Clock per Machine Cycle Compatibility Mode Up to 20 MIPS Throughput at 20 MHz Clock Frequency


    Original     		PDF 16x16 24KB/32KB 512-byte 8051 PC keyboard CIRCUIT diagram atmel AT89LP ISP Studio interface TI PLCC44 Watchdog AT89LP AT89LP51RC2 Delta dps 214 cp AT89LP51RC2-20JU AT89LP51ED2 PDIP40 PLCC44

    AT89LP ISP Studio interface

    Abstract: AT89LP51ED2 sd665 87C51 opcodes AT89C51RD2 parallel PROGRAMMER atmel dac adc 8051 TI PLCC44 Watchdog atmel 8051 microcontroller with built in ADC dac at89s8253 isp programming intel 8051 microcontroller bootloader isp
    Text: Features • 8-bit Microcontroller Compatible with 8051 Products • Enhanced 8051 Architecture – – – – – – – – • • • • • Single Clock Cycle per Byte Fetch 12 Clock per Machine Cycle Compatibility Mode Up to 20 MIPS Throughput at 20 MHz Clock Frequency


    Original     		PDF 16x16 AT89LP51ED2/ID2 512-byte AT89LP ISP Studio interface AT89LP51ED2 sd665 87C51 opcodes AT89C51RD2 parallel PROGRAMMER atmel dac adc 8051 TI PLCC44 Watchdog atmel 8051 microcontroller with built in ADC dac at89s8253 isp programming intel 8051 microcontroller bootloader isp

    Delta DPS 300 RP -2 C REV

    Abstract: AT89LP ISP Studio interface AT89LP51RC2
    Text: Features • 8-bit Microcontroller Compatible with 8051 Products • Enhanced 8051 Architecture – – – – – – – – • • • • • Single Clock Cycle per Byte Fetch 12 Clock per Machine Cycle Compatibility Mode Up to 20 MIPS Throughput at 20 MHz Clock Frequency


    Original     		PDF 16x16 24KB/32KB 512-byte Delta DPS 300 RP -2 C REV AT89LP ISP Studio interface AT89LP51RC2

    AT89LP51RD2

    Abstract: No abstract text available
    Text: Features • 8-bit Microcontroller Compatible with 8051 Products • Enhanced 8051 Architecture – – – – – – – – • • • • • Single Clock Cycle per Byte Fetch 12 Clock per Machine Cycle Compatibility Mode Up to 20 MIPS Throughput at 20 MHz Clock Frequency


    Original     		PDF 16x16 AT89LP51ED2/ID2 AT89LP51RD2

    acp ca14

    Abstract: AD29 AD30 TXC-05551 CA6 SOT l9111 cma1 s c12 virtual-circuit
    Text: SARA II Segmentation and Reassembly Device TXC-05551 DATA SHEET PRODUCT PREVIEW FEATURES DESCRIPTION • Full duplex segmentation and reassembly of multiple VCs up to 155 Mbit/s in each direction • Integrated SONET/SDH 155.52 Mbit/s framer. • Optional 8-bit UTOPIA interface


    Original     		PDF TXC-05551 TXC-05551-MB acp ca14 AD29 AD30 TXC-05551 CA6 SOT l9111 cma1 s c12 virtual-circuit

    AD29

    Abstract: AD30 TXC-05551 RH -005c RELAY
    Text: SARA-2 ATM Cell Processing IC Device TXC-05551 DATA SHEET PRODUCT PREVIEW DESCRIPTION • Functionality enabled by application-specific microcode e.g., SARA-Lite Microcode • Full-duplex segmentation and reassembly of multiple VCs up to 155 Mbit/s in each direction


    Original     		PDF TXC-05551 AD29 AD30 TXC-05551 RH -005c RELAY

    X32B

    Abstract: 00BF sot 23
    Text: BACK SARA-2 ATM Cell Processing IC Device TXC-05551 DATA SHEET PRODUCT PREVIEW DESCRIPTION • Functionality enabled by application-specific microcode e.g., SARA-Lite Microcode • Full-duplex segmentation and reassembly of multiple VCs up to 155 Mbit/s in each direction


    Original     		PDF TXC-05551 sche6-9453 TXC-05551-MB X32B 00BF sot 23

    CHN T4 1060

    Abstract: prma 1824 MN103S AM32 MN103S00 MN103S33N AN-1998 932DM t509 r5 cpu am32
    Text: MICROCOMPUTER MN103S00 MN103S33N/F33N LSI 説明書 Pub.No.23233-011 PanaXSeriesは松下電器産業株式会社の商標です。 その他記載された会社名及びロゴ、製品名などは該当する各社の商標または登録商標です。


    Original     		PDF MICROCOMPUTERMN103S00 MN103S33N/F33N 14PWM 23ROM CHN T4 1060 prma 1824 MN103S AM32 MN103S00 MN103S33N AN-1998 932DM t509 r5 cpu am32

    Untitled

    Abstract: No abstract text available
    Text: SARA -2 X-i t c h DATA SHEET PRODUCT PREVIEW DESCRIPTION Functionality enabled by application-specific microcode e.g., SARA-Lite Microcode Full-duplex segmentation and reassembly of multiple VCs up to 155 Mbit/s in each direction Integrated SONET/SDH 155 Mbit/s framer


    OCR Scan     		PDF TXC-05551 TXC-05551-MB

    Untitled

    Abstract: No abstract text available
    Text: SARA -2 T * A N S W I T C ATM Cell Processing 1C Device TXC-05551 H X- DATA SHEET PRODUCT PREVIEW DESCRIPTION or in their formative • Router information on products • Adapter cards Misc. t Serial EEPROM Interface 4 15 \ 13 PCI Bus „ 49r


    OCR Scan     		PDF TXC-05551 32-bit) TXC-05551 TXC-05551-MB

    STM CL-80

    Abstract: acp ca14 AD10 AD14 TXC-05551
    Text: SARA-2 ATM Cell Processing 1C Device TXC-05551 DATA SHEET PRODUCT PREVIEW DESCRIPTION Test Access Port SARA-2 is a single-chip solution using feature/ application-specific microcode that performs complete segmentation and reassembly SAR for implementing


    OCR Scan     		PDF TXC-05551 SALI-25C TXC-05551 STM CL-80 acp ca14 AD10 AD14

    Untitled

    Abstract: No abstract text available
    Text: SARA-2 ATM Cell Processing 1C Device TXC-05551 DATA SHEET PRODUCT PREVIEW DESCRIPTION FEATURES Full-duplex segmentation and reassembly of multiple VCs up to 155 Mbit/s in each direction Integrated SONET/SDH 155 Mbit/s framer Optional 8-bit UTOPIA interface


    OCR Scan     		PDF TXC-05551 SALI-25C TXC-05551-MB