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    CML VTERM Search Results

    CML VTERM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    HMC675LP3E Analog Devices Comparator-CMl 13GHz Visit Analog Devices Buy
    HMC675LP3ETR Analog Devices Comparator-CMl 13GHz Visit Analog Devices Buy
    ADCMP572BCPZ-RL7 Analog Devices Single Supply, CML on XFCB3.0- Visit Analog Devices Buy
    ADCMP572BCPZ-R2 Analog Devices Single Supply, CML on XFCB3.0- Visit Analog Devices Buy
    ADCMP572BCPZ-WP Analog Devices Single Supply, CML on XFCB3.0- Visit Analog Devices Buy

    CML VTERM Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CML ECL termination

    Abstract: AND8173 AND8020
    Text: AND8173/D Termination and Interface of On Semiconductor ECL Devices With CML Current Mode Logic OUTPUT Structure http://onsemi.com APPLICATION NOTE By Paul Shockman Contents SECTION 1.UNLOADED CML VOLTAGE LEVELS (DC OPEN) SECTION 2.DIRECT CONNECT (DC) CML LOAD


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    PDF AND8173/D CML ECL termination AND8173 AND8020

    AND8020

    Abstract: CML ECL termination Z0 127 TRANSISTOR equivalent
    Text: AND8173/D Termination and Interface of ON Semiconductor ECL Devices With CML Current Mode Logic OUTPUT Structure http://onsemi.com APPLICATION NOTE By Paul Shockman Introduction Contents SECTION 1.UNLOADED CML VOLTAGE LEVELS (DC OPEN) SECTION 2.DIRECT CONNECT (DC) CML LOAD


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    PDF AND8173/D AND8020 CML ECL termination Z0 127 TRANSISTOR equivalent

    CML buffer

    Abstract: zn470 ORSO42G5 ORSO82G5 ORT42G5 ORT82G5 quad resistor 470 ohm
    Text: FPSC SERDES CML Buffer Interface July 2003 Technical Note TN1029 Introduction This document discusses the high-speed serial buffers provided in Lattice’s ORT82G5, ORT42G5, ORSO82G5 and ORSO42G5 FPSC devices. These current mode logic CML buffers are part of a second generation Quad


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    PDF TN1029 ORT82G5, ORT42G5, ORSO82G5 ORSO42G5 ORT82G5 ORT42G5 ORSO82G5 CML buffer zn470 quad resistor 470 ohm

    SN65LVDS100 Application Report

    Abstract: CDC111 CDCLVP110 CDCVF111 SN65LVDS101 SN65LVDT100 SN65LVDT33 SLLA101 sn65lvds CML100
    Text: Application Report SCAA059C – March 2003 – Revised October 2007 AC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML Kal Mustafa/Chris Sterzik. High Performance Analog


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    PDF SCAA059C SN65LVDS100 Application Report CDC111 CDCLVP110 CDCVF111 SN65LVDS101 SN65LVDT100 SN65LVDT33 SLLA101 sn65lvds CML100

    SLLA101

    Abstract: CML ECL termination EZ 644 rs-422 TO lvds SN65LVDS108
    Text: Application Report SLLA101 - May 2001 Interfacing Different Logic With LVDS Receivers Chris Sterzik Data Transmission ABSTRACT This application report provides explanations and design considerations for interfacing RS–422, differential current mode logic CML , differential emitter coupled logic (ECL), and


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    PDF SLLA101 CML ECL termination EZ 644 rs-422 TO lvds SN65LVDS108

    SLLA101

    Abstract: CML ECL termination rs-422 TO lvds SN65LVDS108
    Text: Application Report SLLA101 - September 2001 Interfacing Different Logic With LVDS Receivers Chris Sterzik Data Transmission ABSTRACT This application report provides explanations and design considerations for interfacing RS–422, differential current mode logic CML , differential emitter coupled logic (ECL), and


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    PDF SLLA101 CML ECL termination rs-422 TO lvds SN65LVDS108

    SLLA120

    Abstract: TLK1201 SN65LVDS9x SLK2501 SLK2511 TLK3114SA pecl logic voltage levels TLK1501 TLK2201 TLK2501
    Text: Application Report SLLA120 - December 2002 Interfacing Between LVPECL, VML, CML, and LVDS Levels Serial Gigabit Solutions Nick Holland ABSTRACT This application report introduces the various interface standards used today in modern telecom and datacom systems and describes the methods used to interface between similar


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    PDF SLLA120 TLK1201 SN65LVDS9x SLK2501 SLK2511 TLK3114SA pecl logic voltage levels TLK1501 TLK2201 TLK2501

    sdh S 4.1

    Abstract: CB50-1206 STM-16 VSC8121
    Text: VITESSE SEMICONDUCTOR CORPORATION Data Sheet 2.488GHz SONET/SDH Clock Generator VSC8121 Features • Monolithic Phase Locked Loop • Jitter Meets SONET OC-48 and SDH STM-16 Requirements • On-Chip LC Oscillator • High Speed CML Clock Output • On-Chip Loop Filter


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    PDF 488GHz VSC8121 OC-48 STM-16 10x10mm VSC8121 G52163-0, sdh S 4.1 CB50-1206

    TDK-CB50-1206

    Abstract: u 741 u741 STM-16 VSC8121 30 pin FRC CON vitesse oscillator 77.76mhz
    Text: VITESSE SEMICONDUCTOR CORPORATION Data Sheet 2.488GHz SONET/SDH Clock Generator VSC8121 Features • Monolithic Phase Locked Loop • Jitter Meets SONET OC-48 and SDH STM-16 Requirements • On-Chip LC Oscillator • High-Speed CML Clock Output • On-Chip Loop Filter


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    PDF 488GHz VSC8121 OC-48 STM-16 VSC8121 488GHz G52163-0, TDK-CB50-1206 u 741 u741 30 pin FRC CON vitesse oscillator 77.76mhz

    VSC9182

    Abstract: No abstract text available
    Text: VSC9182 Data Sheet 64x64 STS-12/STM-4 TSI Switch Fabric FEATURES • 64x64 STS-12/STM-4 TSI Switch with Nonblocking 768x768 STS-1 Switch Matrix • Supports Both Multicast and Broadcast • Serial LVDS 622Mb/s High-Speed Interface with PECL/CML Compatibility and Retiming


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    PDF VSC9182 64x64 STS-12/STM-4 768x768 622Mb/s 50MHz 11-Bit P1149

    e5027

    Abstract: BYT 70 VT221 sgi01 E4110 march networks stm-5 gif11 E1110 327-o E9110
    Text: VTXP-24 Device 1.25 Gbps Virtual Tributary Processor with Integrated VT/STS & VC/AU3 Switch TXC-06970 DATA SHEET PRODUCT PREVIEW TXC-06970-MB, Ed. 2 March 2006 FEATURES • Line or Client interfaces - Dual CML 2.488 Gbit/s TFI-5 compliant shared with terminal and interconnect interfaces


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    PDF VTXP-24 TXC-06970 TXC-06970-MB, e5027 BYT 70 VT221 sgi01 E4110 march networks stm-5 gif11 E1110 327-o E9110

    Untitled

    Abstract: No abstract text available
    Text: VTXP-48 Device 2.5 Gbps Virtual tributary Processor with Integrated 45 Gbps VT/STS & VC/AU3 Switch TXC-06960 DATA SHEET PRODUCT PREVIEW TXC-06960-MB, Ed. 2 March 2006 FEATURES • Line or Client interfaces - Dual CML 2.488 Gbit/s TFI-5 compliant shared with terminal and inter-connect interfaces


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    PDF VTXP-48 TXC-06960 TXC-06960-MB, STS-3c/STS-12c/STS-48c

    CML Vterm

    Abstract: CDC111 CDCLVD110 CDCLVP110 CDCVF111 SN65LVDS101 SN65LVDT100 SN65LVDT122 SN65LVDT33 SN64LVDS33
    Text: Application Report SCAA059 – March 2003 AC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML Kal Mustafa/Chris Sterzik High Performance Analog ABSTRACT This report provides a quick reference of ac-coupling techniques for interfacing between different logic levels. The four differential signaling levels found in this report are lowvoltage positive-referenced emitter coupled logic LVPECL , low-voltage differential


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    PDF SCAA059 CML Vterm CDC111 CDCLVD110 CDCLVP110 CDCVF111 SN65LVDS101 SN65LVDT100 SN65LVDT122 SN65LVDT33 SN64LVDS33

    Si53320

    Abstract: si5332
    Text: Si53320 1:5 L O W J I T T E R LVPECL C LOCK B UFFER W I T H 2:1 I NPUT M UX Features         5 LVPECL outputs  Ultra-low additive jitter: 100 fs rms  Wide frequency range: 1 to 725 MHz  Input compatible with LVPECL, LVDS, CML, HCSL, LVCMOS


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    PDF Si53320 20-TSSOP MC100LVEP14, SY100EP14U, MAX9310 si5332

    Untitled

    Abstract: No abstract text available
    Text: VITESSE SEMICONDUCTOR CORPORATION Target Specification 2.488 Gb/s Quad Data Re-timer VSC8124 Features • Four Channel 2.488 Gb/s Data Recovery • Differential on Chip Terminated Serial Data I/O • SONET Quality Jitter Tolerance • Bypass for OC3, OC12 Data Rates


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    PDF VSC8124 VSC8124 G52271-0,

    VSC8124

    Abstract: No abstract text available
    Text: VITESSE SEMICONDUCTOR CORPORATION Target Specification 2.488 Gb/s Quad Data Re-timer VSC8124 Features • Four Channel 2.488 Gb/s Data Recovery • Differential on Chip Terminated Serial Data I/O • SONET Quality Jitter Tolerance • Bypass for OC3, OC12 Data Rates


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    PDF VSC8124 VSC8124 G52271-0,

    MO-220 7x7 0.4 pitch

    Abstract: si5331 Si53313
    Text: Si53313 D UAL 1:5 L OW J I T T E R B UFFER / L EVEL T RANSLATOR <1.25 GH Z Features        10 differential or 20 LVCMOS outputs Ultra-low additive jitter: 100 fs rms  Wide frequency range: 1 MHz to 1.25 GHz  Any-format input with pin selectable


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    PDF Si53313 44-QFN MO-220 7x7 0.4 pitch si5331

    Si53303

    Abstract: No abstract text available
    Text: Si53303 D UAL 1:5 L OW J I T T E R B UFFER / L EVEL T RANSLATOR Features         10 differential or 20 LVCMOS outputs Ultra-low additive jitter: 100 fs rms Wide frequency range: 1 to 725 MHz Any-format input with pin selectable


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    PDF Si53303 44-QFN

    ecl 806

    Abstract: CML ECL termination PLE 2 - 25va Vterm pecl logic voltage levels
    Text: Application Note 806 LVPECL, PECL, ECL Logic and Termination March 2009 by: Ken Johnson and Bob Gubser ABSTRACT This application note will highlight characteristics of Pletronics Low Voltage Positive Emitter Coupled Logic LVPECL frequency control products and provide guidance for


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    PDF

    Si53304

    Abstract: No abstract text available
    Text: Si53304 1:6 L OW J I T T E R U NIVERSAL B U F F E R /L EVEL T RANSLATOR WITH 2 : 1 I NPUT M UX A N D I NDIVIDUAL OE Features         6 differential or 12 LVCMOS outputs  Ultra-low additive jitter: 100 fs rms  Wide frequency range: 1 to 725 MHz


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    PDF Si53304 32-QFN

    Si53314

    Abstract: in 5007
    Text: Si53314 1 : 6 L O W J IT TE R U N I V E R S A L B U FF E R / L E V E L T R A N S L A T O R W IT H 2 : 1 I N P U T M U X A N D I N D I V I D U A L O E < 1 . 2 5 G H Z Features        6 differential or 12 LVCMOS outputs  Ultra-low additive jitter: 100 fs rms 


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    PDF Si53314 32tial in 5007

    RJL-ST11H-SO51

    Abstract: Stratos st11 3 PORT 10 100 ETHERNET TRANSCEIVER MIL-STK-ST31M
    Text: MIL-SxK-ST11x DC Coupled MIL-SxK-ST31x (AC Coupled) MIL-SxK-ST41x (DC Coupled, Jam) MIL-SxK-ST61x (AC Coupled, Jam) MILITARY SFF OPTICAL TRANSCEIVER Gigabit Ethernet / 1x Fibre Channel Applications 3.3V, 850nm VCSEL, Multimode, Up to 550M APPLICATIONS FEATURES


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    PDF MIL-SxK-ST11x MIL-SxK-ST31x MIL-SxK-ST41x MIL-SxK-ST61x 850nm TDS-MIL-SxK-003 RJL-ST11H-SO51 Stratos st11 3 PORT 10 100 ETHERNET TRANSCEIVER MIL-STK-ST31M

    Si53315

    Abstract: 44qfn
    Text: Si53315 1 : 1 0 L O W J I TT E R U N I V E R S A L B U F F E R /L E V E L T R A N S L A T O R W IT H 2 : 1 I N P U T M U X A N D I N D I V I D U A L O E < 1 . 2 5 G H Z Features         10 differential or 20 LVCMOS outputs Ultra-low additive jitter: 100 fs rms


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    PDF Si53315 44qfn

    rs 422

    Abstract: Si53312
    Text: Si53312 1 : 1 0 L OW J I T T E R U NIVERSAL B U FF E R /L EVEL T RANSLATOR WITH 2 : 1 I NPUT M UX <1.25 GH Z Features Ordering Information: See page 25. Applications Q6 Q6 VDDOB 34 37 35 38 39 DIVA 1 33 DIVB SFOUTA[1] SFOUTA[0] 2 32 3 31 SFOUTB[1] SFOUTB[0]


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    PDF Si53312 44-QFN rs 422