RTAX2000S
Abstract: RTAX1000S-SL cga 624 RTAX1000S RTAX250S RTAX2000 624 CCGA SL D8 E26 RTAX4000S CCGA
Text: RTAX-S/SL RadTolerant FPGAs Package Pin Assignments 208 207 206 205 160 159 158 157 208-Pin CQFP Pin 1 1 2 3 4 156 155 154 153 Ceramic Tie Bar 208-Pin CQFP 108 107 106 105 101 102 103 104 53 54 55 56 49 50 51 52 Figure 3-1 • 208-Pin CQFP Top View Note
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208-Pin
RTAX250S/SL
IO43PB2F2
IO76PB5F5/CLKGP
IO02NB0F0
RTAX2000S
RTAX1000S-SL
cga 624
RTAX1000S
RTAX250S
RTAX2000
624 CCGA
SL D8 E26
RTAX4000S
CCGA
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RQFP
Abstract: EPM9560RC208-15 CQFP 208 datasheet altera epm9560rc208-15 208 pin rqfp drawing CQFP 208 EPM9560WC208-20 EPM9560RC208-20 EPM9560 EPM9560RC208-15C
Text: PRODUCT DISCONTINUANCE NOTICE SELECTED MAX 9000 ORDERING CODES Altera will be discontinuing the EPM9560 in the 208-pin ceramic quad-flat pack package CQFP and substituting compatible power quad flat pack package (RQFP) alternatives. All EPM9560 devices in the 208-pin RQFP are form, fit and functionally equivalent* to the
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EPM9560
208-pin
EPM9560WC208-15
EPM9560WC208-15C
EPM9560WC208-20
RQFP
EPM9560RC208-15
CQFP 208 datasheet
altera epm9560rc208-15
208 pin rqfp drawing
CQFP 208
EPM9560WC208-20
EPM9560RC208-20
EPM9560RC208-15C
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FPQ 208 0.5 10
Abstract: FPQ Package FPQ-256 FPQ 240 FPQ-240-0 FPQ-240-0.5 FPQ-48-0 FPQ-52-0.65-01A 52 FPQ-64 FPQ-44-0
Text: QFP QUAD FLAT PACKAGE ORDERING PROCEDURE FPQ □□□ □. □□ □□ Design NO. Pitch Pin Count Socket Series SPECIFICATIONS Contact resistance: Initial 30mΩ At 10 mA Maximum voltage: AC700V RMS (for 1 minute) Below 0.5mm Pitch
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AC700V
AC500V
FPQ-44-0
FPQ-44-0.
FPQ 208 0.5 10
FPQ Package
FPQ-256
FPQ 240
FPQ-240-0
FPQ-240-0.5
FPQ-48-0
FPQ-52-0.65-01A 52
FPQ-64
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Untitled
Abstract: No abstract text available
Text: QuickRAM Family Data Sheet • • • • • • QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density Up to 316 I/O Pins • Up to 308 bi-directional input/output pins, PCI-compliant for 5.0 V and 3.3 V buses for
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16-bit
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CQFP 208
Abstract: rm5260
Text: Standard Products ACT 5260 64-Bit Superscaler Microprocessor www.aeroflex.com/Avionics January 28, 2004 FEATURES ❑ ❑ Full militarized PMC-Sierra RM5260 microprocessor Dual Issue superscalar PMC-Sierra RISCMark can issue one integer and one floating-point
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64-Bit
RM5260
150MHz
200MHz
SPECInt95
SPECfp95
SCD5260
CQFP 208
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Untitled
Abstract: No abstract text available
Text: QuickRAM Family Data Sheet • • • • • • Up to 90,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density Up to 316 I/O Pins • Up to 308 bi-directional input/output pins,
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16-bit
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Untitled
Abstract: No abstract text available
Text: QuickRAM Family Data Sheet • • • • • • QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density Up to 316 I/O Pins • Up to 308 bi-directional input/output pins, PCI-compliant for 5.0 V and 3.3 V buses for
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16-bit
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ACT5271
Abstract: R4700 R5000 RM5261 RM5271 RM7000
Text: ACT5271 64-Bit Superscaler Microprocessor Features • ■ Full militarized QED RM5271 microprocessor Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle ■ ● Single cycle repeat rate for common single precision operations
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ACT5271
64-Bit
RM5271
SPECInt95
SPECfp95
RM7000,
RM5270,
150MHz
200MHz
250MHz
ACT5271
R4700
R5000
RM5261
RM7000
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ACT5270
Abstract: R4700 R5000
Text: ACT5270 64-Bit Superscaler Microprocessor Features • ■ Full militarized QED RM5270 microprocessor Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle ■ ● Supports ■ ● 133, 150, 200 MHz operating frequencies – Consult Factory for
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ACT5270
64-Bit
RM5270
SPECInt95
SPECfp95
133MHz
150MHz
200MHz
MIL-STD-883
SCD5270
ACT5270
R4700
R5000
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CQFP 240
Abstract: No abstract text available
Text: Military QuickRAM 90,000 Usable PLD Gate QuickRAM Combining Performance, Density and Embedded RAM last updated 5/15/2000 Military QuickRAM DEVICE HIGHLIGHTS FEATURES Device Highlights Features High Performance and High Density Total of 316 I/O pins • 90,000 Usable PLD Gates with 316 I/Os
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16-bit
CQFP 240
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XC9572 VQ44
Abstract: XC3020A XC3020L XC3030A XC3030L XC3042A XC3042L XC3064A XC3064L XC3090A
Text: 44 64 68 84 100 120 132 144 156 160 164 175 24 176 191 196 208 223 225 228 240 256 299 304 352 411 432 475 559 560 PLASTIC LCC PLASTIC QFP PLASTIC VQFP CERAMIC LCC PLASTIC VQFP PLASTIC LCC CERAMIC LCC PLASTIC LCC CERAMIC LCC CERAMIC PGA PLASTIC PQFP PLASTIC TQFP
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PG132
TQ144
PG144
PG156
PQ160
CB164
PP175
PG175
TQ176
PG191
XC9572 VQ44
XC3020A
XC3020L
XC3030A
XC3030L
XC3042A
XC3042L
XC3064A
XC3064L
XC3090A
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MIP7965
Abstract: MIP7965-750B1R cpu aeroflex mip 291 MIP7965-750B1 CQFP 208 datasheet MIPS64 RM5261A RM7065A RM7065C
Text: Standard Products MIP 7965 64-Bit Superscaler Microprocessor October 01, 2010 www.aeroflex.com/Avionics FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features:
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64-Bit
RM7965
MIPS64TM
16-KB,
256-KB,
64-entry
SCD7965
MIP7965
MIP7965-750B1R
cpu aeroflex
mip 291
MIP7965-750B1
CQFP 208 datasheet
MIPS64
RM5261A
RM7065A
RM7065C
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footprint cqfp 132
Abstract: RM7900 SYSad32
Text: Standard Products MIP 7965 64-Bit Superscaler Microprocessor March 11, 2010 www.aeroflex.com/Avionics FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features:
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64-Bit
RM7965
MIPS64TM
16-KB,
256-KB,
64-entry
SCD7965
footprint cqfp 132
RM7900
SYSad32
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aldec g2
Abstract: No abstract text available
Text: Military QuickRAM Family Data Sheet • • • • • • Up to 90,000 Usable PLD Gates QuickRAM Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density • Up to 90,000 usable PLD gates with up to 316 I/Os • 300 MHz 16-bit counters, 400 MHz datapaths,
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16-bit
aldec g2
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XC3042A PQ100
Abstract: WC68 XC3020A XC3020L XC3030A XC3030L XC3042A XC3042L wc84 XC3064L
Text: 44 12 48 64 68 84 100 120 132 144 156 160 164 175 176 184 191 196 208 223 225 228 240 299 304 352 411 432 499 596 PLASTIC LCC PLASTIC QFP PLASTIC VQFP CERAMIC LCC PLASTIC DIP PLASTIC VQFP PLASTIC LCC CERAMIC LCC CERAMIC PGA PLASTIC LCC CERAMIC LCC CERAMIC PGA
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PLAST20
PP132
PG132
TQ144
PG144
PG156
PQ160
CQ164
CB164
PP175
XC3042A PQ100
WC68
XC3020A
XC3020L
XC3030A
XC3030L
XC3042A
XC3042L
wc84
XC3064L
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XC3030A
Abstract: XC3020A XC3020L XC3030L XC3042A XC3042L XC3064A XC3064L XC3090A XC3090L
Text: 44 12 48 64 68 84 100 120 132 144 156 160 164 175 176 184 191 196 208 223 225 228 240 299 304 352 411 432 499 596 PLASTIC LCC PLASTIC QFP PLASTIC VQFP CERAMIC LCC PLASTIC DIP PLASTIC VQFP PLASTIC LCC CERAMIC LCC CERAMIC PGA PLASTIC LCC CERAMIC LCC CERAMIC PGA
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PQ100
TQ100
VQ100
CB100
PG120
PP132
PG132
TQ144
PG144
PG156
XC3030A
XC3020A
XC3020L
XC3030L
XC3042A
XC3042L
XC3064A
XC3064L
XC3090A
XC3090L
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3265DX
Abstract: 40MX 42MX RH1020
Text: Designer Series Development System 3.1.1 Release Notes This document describes the new features and enhancements of the Designer Series Development System 3.1.1 and the Designer Series 3.1.1 Update 1. It also contains instructions on where to find Designer Series software supplement files containing
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ME 1117
Abstract: MO-113 175-PIN CERAMIC QUAD FLATPACK CQFP CQ208 CQ256 CQ84 PQ100 ceramic pin grid array package lead finish cpga dimensions
Text: Package Mechanical Drawings S e p t e m b e r 1997 1997 Actel Corporation 1-409 Ceramic Pin Grid Array 84-Pin CPGA .050" ± .010" Pin #1 ID .045 .055 0.18" ± .002" .100" BSC 1.100" ± .020" square .080" .110" L K J H G 1.000 BSC F E D C B A 1 2 3 4 5 6
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84-Pin
100-Pin
MO-136
ME 1117
MO-113
175-PIN
CERAMIC QUAD FLATPACK CQFP
CQ208
CQ256
CQ84
PQ100
ceramic pin grid array package lead finish
cpga dimensions
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AX125
Abstract: FBGA 896 896-Pin
Text: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at
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180-Pin
AX125
IO32NB3F3
IO59NB5F5
FBGA 896
896-Pin
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CQFP 208
Abstract: No abstract text available
Text: Features I I I I I I Av P T1D^OU cocn A 54[-[3i t î 5iip>erscaler Micr o Pi 0 ceÎS S'or• . ■ Full militarized QED RM5260 microprocessor ■ Dual Issue superscalar QED RISCMark - can issue one integer and one floating-point instruction per cycle
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OCR Scan
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PDF
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100MHz
133MHz
150MHz
200MHZ
MIL-STD-883
SCD5260
CQFP 208
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Untitled
Abstract: No abstract text available
Text: Preliminary v 1 .2 54SX Family FPGAs RadTolerant and HiRel Features • 100%Resource Utilization with 100%Pin Locking Rad T o lera nt 54SX Family • Mixed Voltage Support— 3.3V Operation with 5.0V Input • TestedTotal Ionizing Dose TID Survivability Level
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Untitled
Abstract: No abstract text available
Text: W ie te l Preüminary - m v1 . 2 54SXFamily FPGAs RadTolerant and HiRcl Features • 100%Resource Utilization with 100%Pin Locking R a d T o l e r a n t 5 4 S X F am i l y • Mxed Voltage Support— 3.3VOperation with 5.0VInput
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54SXFamily
CQ208
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Untitled
Abstract: No abstract text available
Text: P r e l i m i n a r y v 1 .3 54SXFamily FPGAs RadTolerant and HiRcl Features • 100%Resource Utilization with 100%Pin Locking R a d T o l e r a n t 5 4 S X F am i l y • Mxed Voltage Support— 3.3VOperation with 5.0VInput Tolerance • Tested Total IonizingDose TID Survivability Level
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54SXFamily
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Untitled
Abstract: No abstract text available
Text: — ' I I I I I I I A C T 5270 | M M M — — — — — — — 1— 1— 1— 1— 1— 1— — — — — — — — ' 64-Bit Superscaler Microprocessor Features • Integrated secondary cache controller R5000 compatible ■ Full militarized QED RM5270 microprocessor
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64-Bit
RM5270
SPECInt95
SPECfp95
R5000
doubIL-PRF-38534
133MHz
150MHz
200MHz
SCD527D
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