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    CY7C09169V Search Results

    CY7C09169V Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C09169V Cypress Semiconductor 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Original PDF
    CY7C09169V-12AC Cypress Semiconductor 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Original PDF
    CY7C09169V-12AI Cypress Semiconductor 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Original PDF
    CY7C09169V-7AC Cypress Semiconductor 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Original PDF

    CY7C09169V Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY7C09159V

    Abstract: CY7C09169V
    Text: fax id: 5208 51 CY7C09159V CY7C09169V PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159V


    Original     		PDF CY7C09159V CY7C09169V 8K/16K CY7C09159V) CY7C09169V) 67-MHz 35-micror CY7C09159V CY7C09169V

    A12L

    Abstract: A13L CY7C09159V CY7C09169V
    Text: 1 CY7C09159V CY7C09169V PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159V


    Original     		PDF CY7C09159V CY7C09169V 8K/16K CY7C09159V) CY7C09169V) 83-MHz 35-micron A12L A13L CY7C09159V CY7C09169V

    CY7C09159V

    Abstract: CY7C09169V
    Text: fax id: 5208 51 CY7C09159V CY7C09169V ADVANCED INFORMATION 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159V


    Original     		PDF CY7C09159V CY7C09169V 8K/16K CY7C09159V) CY7C09169V) CY7C09159V CY7C09169V

    A12L

    Abstract: A13L CY7C09159V CY7C09169V
    Text: fax id: 5208 51 CY7C09159V CY7C09169V PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159V


    Original     		PDF CY7C09159V CY7C09169V 8K/16K CY7C09159V) CY7C09169V) 67-MHz 35-micror A12L A13L CY7C09159V CY7C09169V

    verilog for SRAM 512k word 16bit

    Abstract: CY62512V CYM74P436 192-Macrocell 62128 sram 7C1350 Triton P54C palce16v8 programming guide 7C168A intel 16k 8bit RAM chip
    Text: Product Selector Guide Static RAMs Organization/Density Density X1 X4 4K X8 X9 X16 X18 X32 X36 7C148 7C149 7C150 16K 7C167A 7C168A 7C128A 6116 64K to 72K 7C187 7C164 7C166 7C185 6264 7C182 256K to 288K 7C197 7C194 7C195 7C199 7C1399/V 62256/V 62256V25 62256V18


    Original     		PDF 7C148 7C149 7C150 7C167A 7C168A 7C128A 7C187 7C164 7C166 7C185 verilog for SRAM 512k word 16bit CY62512V CYM74P436 192-Macrocell 62128 sram 7C1350 Triton P54C palce16v8 programming guide 7C168A intel 16k 8bit RAM chip

    A12L

    Abstract: A13L CY7C09159V CY7C09169V
    Text: fax id: 5208 CYPRESS CY7C09159V CY7C09169V PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM • H ig h-speed clo ck to d ata ac ce ss 7.5/12 ns m ax. Features • 3.3V Low o p e ratin g p ow er • True D u al-P o rted m e m o ry cells w h ich allo w sim u lta­


    OCR Scan     		PDF CY7C09159V CY7C09169V 8K/16K CY7C09159V) CY7C09169V) 67-MHz 35-micron A12L A13L CY7C09159V CY7C09169V

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5208 CYPRESS CY7C09159V CY7C09169V ADVANCED INFORMATION 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • High-speed clock to data access 10/12 ns max. • 3.3V Low operating power — Active= 135 mA (typical) • True Dual-Ported memory cells which allow simulta­


    OCR Scan     		PDF CY7C09159V CY7C09169V 8K/16K 100-pin

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5208 CY7C09159V CY7C09169V :/ C Y P R E S S 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM • High-speed clock to data access 7.5/12 ns max. • 3.3V Low operating power Features • True Dual-Ported m em ory cells which allow simulta­ neous access of the same memory location


    OCR Scan     		PDF CY7C09159V) CY7C09169V) 67-MHz 35-micron CY7C09159V CY7C09169V 8K/16K

    Untitled

    Abstract: No abstract text available
    Text: CYPRESS C Y7C 09159V PRELIMINARY_ C Y 7 C 0 9 1 6 9 V 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM H ig h -s p e ed clo ck to d ata ac c e s s 7.5 l1V9/12 ns m a x. Features 3.3 V Low o p e ratin g p ow er • True D u al-P o rted m e m o ry cells w h ich allo w s im u lta ­


    OCR Scan     		PDF 9159V 8K/16K l1V9/12 9169V 100-Pin