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    CY7C1165KV18 Price and Stock

    Rochester Electronics LLC CY7C1165KV18-550BZC

    IC SRAM 18MBIT PAR 165FBGA
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    DigiKey CY7C1165KV18-550BZC Bulk 1,757 6
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    Rochester Electronics LLC CY7C1165KV18-550BZXC

    IC SRAM 18MBIT PAR 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1165KV18-550BZXC Bulk 570 6
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    Rochester Electronics LLC CY7C1165KV18-400BZC

    IC SRAM 18MBIT PARALLEL 165FBGA
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    DigiKey CY7C1165KV18-400BZC Bulk 319 9
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    Rochester Electronics LLC CY7C1165KV18-400BZXC

    IC SRAM 18MBIT PARALLEL 165FBGA
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    DigiKey CY7C1165KV18-400BZXC Bulk 88 9
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    Infineon Technologies AG CY7C1165KV18-550BZC

    IC SRAM 18MBIT PAR 165FBGA
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    DigiKey CY7C1165KV18-550BZC Tray 136
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    Avnet Americas CY7C1165KV18-550BZC Tray 11 Weeks 136
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    CY7C1165KV18 Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1165KV18-400BZC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 400MHZ 165FBGA Original PDF
    CY7C1165KV18-400BZXC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 400MHZ 165FBGA Original PDF
    CY7C1165KV18-550BZC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 550MHZ 165FBGA Original PDF
    CY7C1165KV18-550BZXC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 550MHZ 165FBGA Original PDF

    CY7C1165KV18 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CY7C1163KV18/CY7C1165KV18 18-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency 18-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) Features Configurations • Separate independent read and write data ports


    Original
    PDF CY7C1163KV18/CY7C1165KV18 18-Mbit 550-MHz CY7C1165KV18

    Untitled

    Abstract: No abstract text available
    Text: CY7C1161KV18, CY7C1176KV18 CY7C1163KV18, CY7C1165KV18 18-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency Configurations Features • Separate independent read and write data ports ❐ Supports concurrent transactions With Read Cycle Latency of 2.5 cycles:


    Original
    PDF CY7C1161KV18, CY7C1176KV18 CY7C1163KV18, CY7C1165KV18 18-Mbit 550-MHz CY7C1163KV18

    Untitled

    Abstract: No abstract text available
    Text: CY7C1161KV18, CY7C1176KV18 CY7C1163KV18, CY7C1165KV18 18-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions With Read Cycle Latency of 2.5 cycles:


    Original
    PDF CY7C1161KV18, CY7C1176KV18 CY7C1163KV18, CY7C1165KV18 18-Mbit 550-MHz CY7C1163KV18

    3M Touch Systems

    Abstract: No abstract text available
    Text: CY7C1163KV18, CY7C1165KV18 18-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency 18-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) Features Configurations • Separate independent read and write data ports


    Original
    PDF CY7C1163KV18, CY7C1165KV18 18-Mbit CY7C1163KV18 550-MHz 3M Touch Systems