Untitled
Abstract: No abstract text available
Text: CY7C12611KV18, CY7C12761KV18 CY7C12631KV18, CY7C12651KV18 36-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) Features Functional Description • Separate independent read and write data ports
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CY7C12611KV18,
CY7C12761KV18
CY7C12631KV18,
CY7C12651KV18
36-Mbit
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3M Touch Systems
Abstract: No abstract text available
Text: THIS SPEC IS OBSOLETE Spec No: 001-53193 Spec Title: CY7C12611KV18/CY7C12761KV18/CY7C12631KV18/ CY7C12651KV18, 36-MBIT QDR R II+ SRAM 4-WORD BURST ARCHITECTURE (2.5 CYCLE READ LATENCY) Sunset Owner: Robert Cajustin (AJU) Replaced by: None CY7C12611KV18, CY7C12761KV18
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Original
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PDF
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Y7C12611KV18/CY7C12761KV18/CY7C12631KV18/
CY7C12651KV18,
36-MBIT
CY7C12611KV18,
CY7C12761KV18
CY7C12631KV18,
CY7C12651KV18
3M Touch Systems
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3M Touch Systems
Abstract: No abstract text available
Text: CY7C12611KV18, CY7C12761KV18 CY7C12631KV18, CY7C12651KV18 36-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■
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Original
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PDF
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36-Mbit
CY7C12611KV18,
CY7C12761KV18
CY7C12631KV18,
CY7C12651KV18
CY7C12761KV18,
CY7C12651KV18
3M Touch Systems
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