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Rochester Electronics LLC CY7C1294DV18-167BZC IC SRAM 9MBIT PAR 167MHZ 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1294DV18-167BZC	Tray			13	1 - 10 - 100 $23.56 1000 $23.56 10000 $23.56	Buy Now
Infineon Technologies AG CY7C1294DV18-167BZC IC SRAM 9MBIT PAR 167MHZ 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1294DV18-167BZC	Tray			136	1 - 10 - 100 - 1000 $23.25757 10000 $23.25757	Buy Now
Cypress Semiconductor CY7C1294DV18-167BZC CY7C1294DV18-167BZC
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Verical	CY7C1294DV18-167BZC		108		14	1 - 10 - 100 $28.3125 1000 $28.3125 10000 $28.3125	Buy Now
Rochester Electronics	CY7C1294DV18-167BZC		108		1	1 $22.65 10 $22.65 100 $21.29 1000 $19.25 10000 $19.25	Buy Now

CY7C1294DV18 Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
CY7C1294DV18		Cypress Semiconductor	9-Mbit QDR- II SRAM 2-Word Burst Architecture		Original	PDF
CY7C1294DV18-167BZC		Cypress Semiconductor	9-Mbit QDR- II SRAM 2-Word Burst Architecture		Original	PDF

CY7C1294DV18 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
CY7C1292DV18 Abstract: CY7C1294DV18 Text: CY7C1292DV18 CY7C1294DV18 9-Mbit QDR- II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports The CY7C1292DV18 and CY7C1294DV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate	Original	CY7C1292DV18 CY7C1294DV18 CY7C1292DV18 CY7C1294DV18	PDF
Untitled Abstract: No abstract text available Text: CY7C1292DV18 CY7C1294DV18 PRELIMINARY 9-Mbit QDR-II SRAM 2-Word Burst Architecture Features Configurations • Separate Independent Read and Write data ports — Supports concurrent transactions • 300-MHz clock for high bandwidth • 2-Word Burst on all accesses	Original	CY7C1292DV18 CY7C1294DV18 300-MHz CY7C1292DV18/CY7C1294DV18	PDF
CY7C1292DV18 Abstract: CY7C1294DV18 Text: CY7C1292DV18 CY7C1294DV18 9-Mbit QDR- II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports The CY7C1292DV18 and CY7C1294DV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate	Original	CY7C1292DV18 CY7C1294DV18 CY7C1292DV18 CY7C1294DV18	PDF
Untitled Abstract: No abstract text available Text: THIS SPEC IS OBSOLETE Spec No: 001-00350 Spec Title: CY7C1292DV18/CY7C1294DV18 9-Mbit QDR II SRAM 2-Word Burst Architecture Sunset Owner: AJU Replaced By: None CY7C1292DV18 CY7C1294DV18 9-Mbit QDR® II SRAM 2-Word Burst Architecture Features Configurations	Original	CY7C1292DV18/CY7C1294DV18 CY7C1292DV18 CY7C1294DV18	PDF
Untitled Abstract: No abstract text available Text: CY7C1292DV18 CY7C1294DV18 9-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1292DV18 – 512K x 18 CY7C1294DV18 – 256K x 36 ■ 250 MHz clock for high bandwidth	Original	CY7C1292DV18 CY7C1294DV18 CY7C1292DV18	PDF