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    Infineon Technologies AG CY7C1306CV25-167BZC

    IC SRAM 18MBIT PAR 165FBGA
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    CY7C1306CV25 Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1306CV25-167BZC Cypress Semiconductor 18-Mbit Burst of 2 Pipelined SRAM with QDR Architecture; Architecture: QDR, 2 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 2.4 to 2.6 V Original PDF

    CY7C1306CV25 Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: THIS SPEC IS OBSOLETE Spec No: 001-44701 Spec Title: CY7C1306CV25, 18-MBIT BURST OF 2 PIPELINED SRAM WITH QDR TM ARCHITECTURE (PRELIMINARY) Sunset Owner: Jayasree Nayar (NJY) Replaced by: NONE PRELIMINARY CY7C1306CV25 18-Mbit Burst of 2 Pipelined SRAM with


    Original     		PDF CY7C1306CV25, 18-MBIT CY7C1306CV25

    Untitled

    Abstract: No abstract text available
    Text: CY7C1303CV25 CY7C1306CV25 PRELIMINARY 18-Mbit Burst of 2 Pipelined SRAM with QDR Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 167 MHz clock for high bandwidth ❐ 2.5 ns Clock-to-Valid access time


    Original     		PDF CY7C1303CV25 CY7C1306CV25 18-Mbit

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY CY7C1306CV25 18-Mbit Burst of 2 Pipelined SRAM with QDR Architecture Features Functional Description n Separate independent read and write data ports p Supports concurrent transactions n 167 MHz clock for high bandwidth p 2.5 ns Clock-to-Valid access time


    Original     		PDF CY7C1306CV25 18-Mbit CY7C1303CV25 CY7C1306CV25