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    CY7C1372 Price and Stock

    Rochester Electronics LLC

    Rochester Electronics LLC CY7C1372S-167BGC

    IC SRAM 18MBIT PAR 119PBGA
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    DigiKey CY7C1372S-167BGC Bag 2,058 11
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    Rochester Electronics LLC CY7C1372SV25-167AXC

    IC SRAM 18MBIT PARALLEL 100TQFP
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    DigiKey CY7C1372SV25-167AXC Bag 1,996 11
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    Rochester Electronics LLC CY7C1372S-167AXC

    IC SRAM 18MBIT PARALLEL 100TQFP
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    DigiKey CY7C1372S-167AXC Bag 403 11
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    Rochester Electronics LLC CY7C1372DV25-167AXC

    IC SRAM 18MBIT PAR 100TQFP
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    DigiKey CY7C1372DV25-167AXC Bulk 305 12
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    Rochester Electronics LLC CY7C1372S-167AXCKJ

    IC SRAM 18MBIT PAR 100TQFP
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    DigiKey CY7C1372S-167AXCKJ Bulk 187 13
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    CY7C1372 Datasheets (139)

    Part
    ECAD Model
    Manufacturer
    Description
    Curated
    Datasheet Type
    PDF
    CY7C1372B Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBLTM Architecture Original PDF
    CY7C1372B-200AC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372BV25 Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBLTM Architecture Original PDF
    CY7C1372BV25-200AC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-167AC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-167AI Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-167BGC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-167BGI Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-167BZC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-167BZI Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-200AC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-200AI Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-200BGC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-200BGI Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-200BZC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-200BZI Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-225AC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-225AI Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1372C-225BGC Cypress Semiconductor 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Original PDF
    ...

    CY7C1372 Datasheets Context Search

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    CY7C1370DV25-167BZI

    Abstract: AE144
    Text: CY7C1370DV25 CY7C1372DV25 PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ The CY7C1370DV25 and CY7C1372DV25 are 2.5V, 512K x 36 and 1 Mbit x 18 Synchronous pipelined burst SRAMs with


    Original     		CY7C1370DV25 CY7C1372DV25 18-Mbit 36/1M CY7C1370DV25 CY7C1372DV25 CY7C1370DV25-167BZI AE144 PDF

    CY7C1372A

    Abstract: No abstract text available
    Text: CY7C1370A CY7C1372A PRELIMINARY 512Kx36/1Mx18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 167, 150, 133, and 100 MHz • Fast access time: 3.4, 3.8, 4.2, 5.0 ns


    Original     		CY7C1370A CY7C1372A 512Kx36/1Mx18 CY7C1372A PDF

    CY7C1370DV25-167BZI

    Abstract: CY7C1370DV25 CY7C1372DV25
    Text: CY7C1370DV25 CY7C1372DV25 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ The CY7C1370DV25 and CY7C1372DV25 are 2.5V, 512K x 36 and 1 Mbit x 18 Synchronous pipelined burst SRAMs with


    Original     		CY7C1370DV25 CY7C1372DV25 18-Mbit 36/1M CY7C1370DV25 CY7C1372DV25 CY7C1370DV25-167BZI PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370DV25 CY7C1372DV25 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		CY7C1370DV25 CY7C1372DV25 18-Mbit CY7C1372DV25 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370CV25 CY7C1372CV25 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ The CY7C1370CV25 and CY7C1372CV25 are 2.5V, 512K x 36 and 1M x 18 Synchronous pipelined burst SRAMs with No


    Original     		CY7C1370CV25 CY7C1372CV25 36/1M 250-MHz 225-MHz 200-MHz 167-MHz PDF

    CY7C1370B

    Abstract: CY7C1372B
    Text: CY7C1370B CY7C1372B 512K x 36/1M × 18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between Write and Read cycles • Fast clock speed: 200, 167, 150, and 133 MHz • Fast access time: 3.0, 3.4, 3.8, and 4.2 ns • Internally synchronized registered outputs eliminate


    Original     		CY7C1370B CY7C1372B 36/1M CY7C1370B/CY7C1372B 36/1M CY7C1370B CY7C1372B PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370DV25 CY7C1372DV25 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Functional Description Features • Pin-compatible and functionally equivalent to ZBT™


    Original     		CY7C1370DV25 CY7C1372DV25 18-Mbit 200-MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370B CY7C1372B 512K x 36/1M × 18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between Write and Read cycles • Fast clock speed: 200, 167, 150, and 133 MHz • Fast access time: 3.0, 3.4, 3.8, and 4.2 ns • Internally synchronized registered outputs eliminate


    Original     		CY7C1370B CY7C1372B 36/1M CY7C1370B/CY7C1372B 36/1M BG119) BB165A) PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370DV25 CY7C1372DV25 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		CY7C1370DV25 CY7C1372DV25 18-Mbit 200-MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370D CY7C1372D 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ ■


    Original     		CY7C1370D CY7C1372D 18-Mbit 250-MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370D, CY7C1372D 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and Functionally equivalent to ZBT™ ■ Supports 250-MHz Bus Operations with Zero Wait States ❐ Available speed grades are 250, 200, and 167 MHz


    Original     		CY7C1370D, CY7C1372D 18-Mbit 36/1M CY7C1370D CY7C1372D PDF

    CY7C1370DV25

    Abstract: CY7C1372DV25 CY7C1370DV25-167BZI
    Text: CY7C1370DV25 CY7C1372DV25 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ The CY7C1370DV25 and CY7C1372DV25 are 2.5V, 512K x 36 and 1 Mbit x 18 Synchronous pipelined burst SRAMs with


    Original     		CY7C1370DV25 CY7C1372DV25 18-Mbit 36/1M CY7C1370DV25 CY7C1372DV25 CY7C1370DV25-167BZI PDF

    CY7C1370CV25

    Abstract: CY7C1370CV25-167 CY7C1370CV25-200 CY7C1370CV25-225 CY7C1370CV25-250 CY7C1372CV25 CY7C1372CV25-225 CY7C1372CV25-250
    Text: CY7C1370CV25 CY7C1372CV25 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ The CY7C1370CV25 and CY7C1372CV25 are 2.5V, 512K x 36 and 1M x 18 Synchronous pipelined burst SRAMs with No


    Original     		CY7C1370CV25 CY7C1372CV25 36/1M CY7C1370CV25 CY7C1372CV25 CY7C13demnifies CY7C1370CV25-167 CY7C1370CV25-200 CY7C1370CV25-225 CY7C1370CV25-250 CY7C1372CV25-225 CY7C1372CV25-250 PDF

    CY7C1370BV25-167AC

    Abstract: CY7C1370BV25 CY7C1372BV25
    Text: CY7C1372BV25 CY7C1370BV25 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between Write and Read cycles • Fast clock speed: 200,167, 150, and 133 MHz • Fast access time: 3.0, 3.4, 3.8, 4.2 ns • Internally synchronized registered outputs eliminate


    Original     		CY7C1372BV25 CY7C1370BV25 36/1M CY7C1370BV25-167AC CY7C1370BV25 CY7C1372BV25 PDF

    CY7C1370DV25-167BZI

    Abstract: No abstract text available
    Text: CY7C1370DV25 CY7C1372DV25 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		CY7C1370DV25 CY7C1372DV25 18-Mbit CY7C1372DV25 CY7C1370DV25-167BZI PDF

    CY7C1370B

    Abstract: CY7C1370C CY7C1372C
    Text: CY7C1370C CY7C1372C PRELIMINARY 512Kx36/1Mx18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency™, no dead cycles between write and read cycles • Fast clock speed: 250, 225, 200, and 167 MHz • Fast access time: 2.6, 2.8, 3.0, 3.4 ns


    Original     		CY7C1370C CY7C1372C 512Kx36/1Mx18 CY7C1370C/CY7C1372C BG119) BB165A) CY7C1370B CY7C1370C CY7C1372C PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370D, CY7C1372D 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		CY7C1370D, CY7C1372D 18-Mbit CY7C1370D CY7C1372D PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370DV25 CY7C1372DV25 PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ The CY7C1370DV25 and CY7C1372DV25 are 2.5V, 512K x 36 and 1 Mbit x 18 Synchronous pipelined burst SRAMs with


    Original     		CY7C1370DV25 CY7C1372DV25 18-Mbit 36/1M 250-MHz 200-MHz 167-MHz PDF

    CY7C1370D

    Abstract: CY7C1372D
    Text: CY7C1370D, CY7C1372D 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and Functionally equivalent to ZBT™ ■ Supports 250-MHz Bus Operations with Zero Wait States ❐ Available speed grades are 250, 200, and 167 MHz


    Original     		CY7C1370D, CY7C1372D 18-Mbit 36/1M 250-MHz CY7C1370D CY7C1372D PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370C CY7C1372C PRELIMINARY 512Kx36/1Mx18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency™, no dead cycles between write and read cycles • Fast clock speed: 250, 225, 200, and 167 MHz • Fast access time: 2.6, 2.8, 3.0, 3.4 ns


    Original     		CY7C1370C CY7C1372C 512Kx36/1Mx18 CY7C1370C/CY7C1372C PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370D CY7C1372D 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ ■


    Original     		CY7C1370D CY7C1372D 18-Mbit 250-MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370D, CY7C1372D 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Functional Description Features • Pin-compatible and functionally equivalent to ZBT™


    Original     		CY7C1370D, CY7C1372D 18-Mbit 250-MHz PDF

    CY7C1370C

    Abstract: CY7C1372C
    Text: CY7C1370C CY7C1372C 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states — Available speed grades are 250, 225, 200 and


    Original     		CY7C1370C CY7C1372C 36/1M 250-MHz CY7C1370C CY7C1372C CY7C13 PDF

    CY7C1372D-167BZXC

    Abstract: CY7C1370D-200BZX
    Text: CY7C1370D CY7C1372D 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states — Available speed grades are 250, 200, and 167 MHz


    Original     		CY7C1370D CY7C1372D 18-Mbit 36/1M 250-MHz 200-MHz 167-MHz 165struction CY7C1372D-167BZXC CY7C1370D-200BZX PDF