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    Infineon Technologies AG CY7C1463BV33-133AXI

    IC SRAM 36MBIT PARALLEL 100TQFP
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    Text: CY7C1463BV33 36-Mbit 2 M x 18 Flow-Through SRAM with NoBL Architecture 36-Mbit (2 M × 18) Flow-Through SRAM with NoBL™ Architecture Features Functional Description • No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles


    Original     		PDF CY7C1463BV33 36-Mbit CY7C1463BV33