54HC154
Abstract: No abstract text available
Text: SN54HC154, SN74HC154 LINE TO 16 LINE DECODERS/DEMULTIPLEXERS D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1987 • Decodes 4 Binary-Coded Inputs into One of 16 Mutually Exclusive Outputs • Performs the Demultiplexing Function by Distributing Data From One Input to Any
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SN54HC154,
SN74HC154
300-mil
54HC154
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PDF
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74F138
Abstract: No abstract text available
Text: S N 5 4 F13 8 , S N 74 F13 8 3-LINE TO 8-LINE D EC O D ERS/D EM U LTIPLEXERS D2932, MARCH 1987 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems S N 54F138 . . . J PACKAGE SN 74F138 . . . D OR N PACKAGE TOP VIEW AC 1 U ,6 3 vcc
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D2932,
300-mil
SN54F138
74F138
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PDF
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4T016
Abstract: tc4514 TC4515
Text: TC4514BP, TC4515BP TC4514BP TC4515BP C 2M O S DIG ITAL IN T E G R A T E D C IR C U IT S IL IC O N M O N O L IT H IC 4-BIT LATCH/4-T0-16 LINE DECODER Output Active High Option 4-BIT LATCH/4-T0-16 LINE DECODER (Output Active Low Option) TC4514BP and TC4515BP are decoders which convert 4
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TC4514BP,
TC4515BP
TC4514BP
LATCH/4-T0-16
TC4515BP
4T016
tc4514
TC4515
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PDF
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Untitled
Abstract: No abstract text available
Text: UT54ACS 139/UT54ACTS 139 Radiation-Hardened Dual 2-Line to 4-Line Decoders/Demultiplexers PINOUTS FEATURES 16-Pin DIP Top View • Incorporates two enable inputs to simplify cascading and/or data reception • 1.2 1 radiation-hardened CMOS - Latchup immune
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UT54ACS
139/UT54ACTS
16-pin
UT54ACS139
UT54ACTS139
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PDF
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051b
Abstract: No abstract text available
Text: SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B - MARCH 1987 - REVISED JULY 1996 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems SN54F13 8 . . . J PACKAGE SN74F138. . . D OR N PACKAGE TOP VIEW u Incorporates Three Enable Inputs to
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SN54F138,
SN74F138
SDFS051B
300-mil
SN54F13
SN74F138.
SN54F138
01Qfc
051b
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PDF
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D3318
Abstract: No abstract text available
Text: 74AC11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER D3318, JULY 1989 - R EV ISED APRIL 1993 * Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems * Incorporates Two Enable Inputs to Simplify Cascading and/or Data Reception
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74AC11139
D3318,
500-mA
300-mil
4AC11139
D3318.
D3318
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74ALS137, SN74AS137, SN54ALS137 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES D2661, APRIL 1982 - REVISED M AY 1986 Combings Decoder and 3-Bit Addreis Latch SN54ALS137 . . . J PACKAGE SN74ALS137, SN74AS137 . . . D O R N PACKAGE Incorporates 2 Output Enables to Simplify
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SN74ALS137,
SN74AS137,
SN54ALS137
D2661,
300-mil
SN54ALS137
SN74AS137
ALS137
8N74A8137
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PDF
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LS138
Abstract: SN54ALS138
Text: TYPES SN54ALS138, SN54AS138, SN74ALS138, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS D 2 6 6 1 , APRIL 1 9 8 2 — REVISED DECEMBER 1 9 8 3 Designed Specifically for High-Speed Mem ory Decoders and Data Transmission Systems SN 54A LS138, SN 54A S 138 .
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SN54ALS138,
SN54AS138,
SN74ALS138,
SN74AS138
LS138,
225Q12
LS138
SN54ALS138
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PDF
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SN74F138
Abstract: No abstract text available
Text: SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051 A - D2932, MARCH 1987 - REVISED OCTOBER 1993 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception
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SN54F138,
SN74F138
SDFS051
D2932,
300-mil
SN54F138
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PDF
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SN54ALS137
Abstract: No abstract text available
Text: SN74ALS137, SN74AS137, SN54ALS137 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES D2661, APRIL 1982 - REVISED MAY 1986 Combines Decoder and 3-Bit Address Latch Incorporates 2 Output Enables to Simplify Cascading SN54ALS137 . . . J PACKAGE SN74ALS137, SN74AS137 . . . D OR N PACKAGE
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SN74ALS137,
SN74AS137,
SN54ALS137
D2661,
300-mil
SN54ALS137
SN74AS137
ALS137
SN74A
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PDF
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042b
Abstract: No abstract text available
Text: 74AC11138 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCAS042B - MAY 1988 - REVISED A P R IL I 996 D, N, OR PW PACKAGE TOP VIEW Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Y1 [ 1 Y2 [ 2 Incorporates Three Enable Inputs to
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74AC11138
SCAS042B
500-mA
300-mil
32-Bit
042b
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SC LS190P- FEBRUARY 19 9 3 - REVISED JULY 1996 EPIC Enhanced-Performance Implanted CMOS 2-fi Process Typical Vqlp (Output Ground Bounce) < 0.8 V at Vc c , Ta = 25°C SN54LV138. . . J OR W PACKAGE
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SN54LV138,
SN74LV138
LS190P-
SN54LV138.
SN74LV13S.
MIL-STD-883C,
JESD-17
300-mll
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PDF
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Untitled
Abstract: No abstract text available
Text: 74ACT11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER SCASI 75A - SEPTEMBER 1991 - REVISED APRIL 1996 • Inputs Are TTL-Voltage Compatible • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems D, N, OR PW PACKAGE TOP VIEW
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74ACT11139
500-mA
300-mil
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PDF
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74HC239
Abstract: C-239 SN74HC239
Text: SN54HC239, SN74HC239 DUAL 2-LINE TO 4 LINE DECODERS/DEMULTIPLEXERS D 2 8 0 4 . MARCH 1 9 8 4 -R E V IS E D SEPTEMBER 1987 • • S N 5 4 H C 2 3 9 . . . J P AC KAG E S N 7 4 H C 2 3 9 . . . D W OR N P A C K A G E TO P V IE W ! IG C 1 U 1A C 2 Incorporates 2 Enable Inputs to Simplify
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SN54HC239,
SN74HC239
300-m
SN54H
74HC239
C-239
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PDF
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Untitled
Abstract: No abstract text available
Text: 74ACT11139 DUAL M IN E TO 4-LINE DECODER/DEMULTIPLEXER SCASI 75 - D3907, SEPTEMBER 1991 - REVISED APRIL 1993 D, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems
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74ACT11139
D3907,
500-mA
300-mll
SCAS175-D39Q7,
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHC138, SN74AHC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS S CLS258C - DECEM BER 1995 - REVISED JULY 1996 Operating Range 2-V to 5.5-V Vqc E P IC * Enhanced-Performance Implanted CMOS Process SN54AMC138 . . . J O R W PACKAGE SN74AHC138 . . . D, DB, N, OR PW PACKAGE
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SN54AHC138,
SN74AHC138
CLS258C
300-mll
SN54AMC138
SN74AHC138
SN54AHC138
AHC138
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54HCT137, SN74HCT137 3 LINE TO 8-LIME DECODERSfDEMULTIPLEXERS WITH ADDRESS LATCHES D 2 8 0 4 . M AR C H 1 9 8 4 -R E V IS E D JUNE 1 9 8 9 S N 5 4 H C T 1 3 7 . . . J P AC KA G E Inputs are TTL-Voltage Compatible S N 7 4 H C T 1 3 7 . . . N P AC KAG E •
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SN54HCT137,
SN74HCT137
300-mil
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54HC139, SN74HC139 DUAL 2 LINE TO 4-LINE DECODERS/DEMULTIPLEXERS D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1987 D esigned S pecifically for H igh-Speed S N 5 4 H C 1 3 9 . . . J PACKAGE S N 7 4 H C 1 3 9 . . . O W OR N PACKAGE M e m o ry D ecoders and D ata Transm ission
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SN54HC139,
SN74HC139
SN54NC139
8N74HC139
7526S
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54HCT237, SN74HCT237 3 LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES D 2 8 0 4 , M A R C H 1 9 8 4 - R E V I S E D JU N E 1 9 8 9 • Inputs are TTL-Voltage Compatible S N 5 4 H C T2 3 7 . . . J PA C KA G E SN 74H C T237 . . . N PACKAG E •
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SN54HCT237,
SN74HCT237
300-mil
CT237
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDAS055E – APRIL 1982 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs to Simplify
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SN54ALS138A,
SN54AS138,
SN74ALS138A,
SN74AS138
SDAS055E
300-mil
SN54AS138
SN74AS138
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHCT139, SN74AHCT139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS267J – DECEMBER 1995 – REVISED NOVEMBER 1999 D D D D description SN54AHCT139 . . . J OR W PACKAGE SN74AHCT139 . . . D, DB, DGV, N, OR PW PACKAGE TOP VIEW 1G 1A 1B 1Y0 1Y1 1Y2
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Original
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SN54AHCT139,
SN74AHCT139
SCLS267J
MIL-STD-883,
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PDF
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sn74als138a ti
Abstract: SN54ALS138
Text: SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDAS055E – APRIL 1982 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs to Simplify
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Original
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SN54ALS138A,
SN54AS138,
SN74ALS138A,
SN74AS138
SDAS055E
300-mil
SN54AS138
SN74AS138
sn74als138a ti
SN54ALS138
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54ALS139, SN74ALS139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SDAS204A – APRIL 1982 – REVISED DECEMBER 1994 • • • SN54ALS139 . . . J PACKAGE SN74ALS139 . . . D OR N PACKAGE TOP VIEW Designed Specifically for High-Speed Memory Decoders and Data Transmission
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Original
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SN54ALS139,
SN74ALS139
SDAS204A
300-mil
SN54ALS139
SN74ALS139
ALS139
dev1999)
SCBA012A
SDYA009C
|
PDF
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Untitled
Abstract: No abstract text available
Text: SN54HCT138, SN74HCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS171C – MARCH 1984 – REVISED MAY 1997 D SN54HCT138 . . . J OR W PACKAGE SN74HCT138 . . . D, N, OR PW PACKAGE TOP VIEW A B C G2A G2B G1 Y7 GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC
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Original
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SN54HCT138,
SN74HCT138
SCLS171C
300-mil
SN54HCT138
SN74HCT138
HCT138
SCBA004C
SN54/74HCT
SCLA011
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PDF
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