DIGITAL CLOCK DESIGN Search Results

DIGITAL CLOCK DESIGN Result Highlights (5)

Part	Manufacturer	Description
TB67S539FTG	Toshiba Electronic Devices & Storage Corporation	Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface
TB67S149AFTG	Toshiba Electronic Devices & Storage Corporation	Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface
TB67S549FTG	Toshiba Electronic Devices & Storage Corporation	Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface
DCL541A01	Toshiba Electronic Devices & Storage Corporation	Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: Low / Input disable
DCL542H01	Toshiba Electronic Devices & Storage Corporation	Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=2:2) / Default Output Logic: High / Output enable

DIGITAL CLOCK DESIGN Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
SAA7115 Abstract: SAA7112 ITU-601 "Video Decoder" SAF7113 LQFP100 PLCC68 QFP64 SAA7110A SAA7111A SAA7113 Text: Digital Video Decoders Your Digital Gateway to the Analog World Semiconductors Recommended for New Designs DEVICE Clock: Sample Rate Line-Locked Clock MPEG Compatible Clock Real-Time Control RTC Audio Clock Input: Analog Inputs Analog-to-Digital Converters (ADCs)	Original		PDF
24bit rgb input to 8bit ITU output Abstract: ITU-601 SAA7115 ITU601 LQFP100 SAA7110A SAA7111A SAA7112 SAA7113 SAA7114 Text: Philips Semiconductors NEW SAA7115 Your Digital Gateway to the Analog World Digital Video Decoders from the World Leader DEVICE Clock: Sample Rate Line-Locked Clock MPEG Compatible Clock Real-Time Control RTC Audio Clock Input: Analog Inputs Analog-to-Digital	Original	SAA7115 16-BIT MSD592 24bit rgb input to 8bit ITU output ITU-601 SAA7115 ITU601 LQFP100 SAA7110A SAA7111A SAA7112 SAA7113 SAA7114	PDF
sl-1042-30t DISPLAY Abstract: sl-1042-30t sl-1042 sl-1042-30t sanyo SL-1042-30T Data Sheet sanyo led display sl SL1042-30T LC85632 SL-1994-55T sl104230t Text: Ordering number : EN4659 SANYO Semiconductors DATA SHEET LC85632 CMOS IC Digital Alarm Clock Overview multi-function digital digital clock clock IC IC that that inin addition to providing current time display supports a wide The LC85632 is aa multi-function	Original	EN4659 LC85632 LC85632 sl-1042-30t DISPLAY sl-1042-30t sl-1042 sl-1042-30t sanyo SL-1042-30T Data Sheet sanyo led display sl SL1042-30T SL-1994-55T sl104230t	PDF
ICS421-05 Abstract: ICS421G-05LF ICS421G-05LFT Text: ICS421-05 DIGITAL VIDEO CAMERA CLOCK Description Features The ICS421-05 is a low-power, low-jitter clock synthesizer developed for digital camera applications. The device accepts a 27 MHz input clock to support common digital video camera interface frequencies	Original	ICS421-05 ICS421-05 IEEE1394, IEEE1394 ICS421G-05LF ICS421G-05LFT	PDF
ICS421-05 Abstract: CCD camera board CCD MARKING Text: DATASHEET ICS421-05 DIGITAL VIDEO CAMERA CLOCK Description Features The ICS421-05 is a low-power, low-jitter clock synthesizer developed for digital camera applications. The device accepts a 27 MHz input clock to support common digital video camera interface frequencies	Original	ICS421-05 ICS421-05 IEEE1394, IEEE1394 fo284 199707558G CCD camera board CCD MARKING	PDF
24 pin camera Abstract: 72M Capacitor Text: DATASHEET ICS421-05 DIGITAL VIDEO CAMERA CLOCK Description Features The ICS421-05 is a low-power, low-jitter clock synthesizer developed for digital camera applications. The device accepts a 27 MHz input clock to support common digital video camera interface frequencies	Original	ICS421-05 IEEE1394, 199707558G 24 pin camera 72M Capacitor	PDF
24 pin camera Abstract: No abstract text available Text: SG588 Low EMI Clock Generator for Digital Camera Approved Product Product Features Pin Description The IMISG588 is a clock generator that integrates clock requirements for Digital Camera. It integrates a Spectrum Spread technology, a modulation technique designed specifically for reducing EMI at the	Original	SG588 IMISG588 16pin IMISG588BTB SG588BTB 24 pin camera	PDF
AN1405 Abstract: AN1406 digital clock design PECL Motorola Text: Low Jitter, Low Emission Timing Solutions For High Speed Digital Systems A Design Methodology The Challenges of High Speed Digital Clock Design Designing clock generation and distribution systems for today’s high speed digital electronic devices poses numerous challenges to the design	Original		PDF
CLK180 Abstract: DS485 vhdl code for DCM Text: Digital Clock Manager DCM Module DS485 April 24, 2009 Product Specification Introduction LogiCORE Facts The Digital Clock Manager (DCM) primitive in Xilinx FPGA parts is used to implement delay locked loop, digital frequency synthesizer, digital phase shifter, or a	Original	DS485 CLK180 vhdl code for DCM	PDF
transistor a1m Abstract: digital clock with alarm design 12 Hour Digital Clock Circuit DS1375 DS1375T T633 Text: Rev 2; 9/08 I2C Digital Input RTC with Alarm Features The DS1375 digital real-time clock RTC is a low-power clock/calendar that does not require a crystal. The device operates from a digital clock input pin at one of four frequencies: 32.768kHz, 8.192kHz, 60Hz, or 50Hz.	Original	DS1375 768kHz, 192kHz, 24-hour 12-hour DS1375 transistor a1m digital clock with alarm design 12 Hour Digital Clock Circuit DS1375T T633	PDF
Untitled Abstract: No abstract text available Text: Rev 2; 9/08 I2C Digital Input RTC with Alarm Features The DS1375 digital real-time clock RTC is a low-power clock/calendar that does not require a crystal. The device operates from a digital clock input pin at one of four frequencies: 32.768kHz, 8.192kHz, 60Hz, or 50Hz.	Original	DS1375 768kHz, 192kHz, 24-hour 12-hour DS1375	PDF
Untitled Abstract: No abstract text available Text: BU2394KN High-performance Clock Generator Series 3ch Clock Generators for Digital Cameras BU2394KN,BU2396KN No.09005EAT02 ●Description These clock generators are an IC generating three types of clocks – CCD, USB, and VIDEO clocks – necessary for digital	Original	BU2394KN BU2394KN BU2396KN 09005EAT02 R0039A	PDF
DS1375 Abstract: J-STD-020A 8192Hz 12 Hour Digital Clock Circuit Text: Rev 0; 4/03 2-Wire Digital Input RTC with Alarm Features The DS1375 digital real-time clock RTC is a low-power clock/calendar that does not require a crystal. The device operates from a digital clock input pin at one of four frequencies: 32.768kHz, 8.192kHz, 60Hz, or 50Hz.	Original	DS1375 768kHz, 192kHz, 24-hour 12-hour DS1375 J-STD-020A 8192Hz 12 Hour Digital Clock Circuit	PDF
AN282 Abstract: AN306 CS4350 Text: AN306 Simplifying System Design Using the CS4350 PLL DAC 1. INTRODUCTION Typical Digital to Analog Converters DACs require a high-speed Master Clock to clock their digital filters and modulators, as well as some portions of their discrete time analog circuitry. This Master Clock (or system clock) is typically required to be synchronous to the left-right (frame or word) clock (LRCK) in order to maintain sample alignment	Original	AN306 CS4350 AN306REV1 AN282 AN306	PDF

digital alarm clock Abstract: DS1375 J-STD-020A Text: Rev 1; 1/04 2-Wire Digital Input RTC with Alarm Features The DS1375 digital real-time clock RTC is a low-power clock/calendar that does not require a crystal. The device operates from a digital clock input pin at one of four frequencies: 32.768kHz, 8.192kHz, 60Hz, or 50Hz.	Original	DS1375 768kHz, 192kHz, 24-hour 12-hour DS1375 digital alarm clock J-STD-020A	PDF
phase detector in RTL Abstract: ADPLL phase detector CH-2555 ADPLL with low jitter Text: iniADPLL All Digital Phase Locked Loop Features • • • • • • • • • General Description The iniADPLL is an all digital implementation of a phase locked loop. PLLs are widely used in telecom applications for clock recovery, clock generation and clock supervision. The all digital solution needs no external	Original		PDF
HDB3 Abstract: oscillator 16.384MHZ 16.384MHZ Alarm Clock by using ttl Digital Alarm Clock by ttl Digital Alarm Clock by using ttl HDB3 to nrz nrz to hdb3 DP40 DS3109 Text: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MV1445 PRELIMINARY INFORMATION DS3109 2.2 MV1445 COMBINED PCM HDB3 DECODER, DIGITAL CLOCK REGENERATOR AND TIMESLOT ZERO RECEIVER The MV1445 combines the HDB3 Decoder, Digital Clock	Original	MV1445 DS3109 MV1445 048Mbit HDB3 oscillator 16.384MHZ 16.384MHZ Alarm Clock by using ttl Digital Alarm Clock by ttl Digital Alarm Clock by using ttl HDB3 to nrz nrz to hdb3 DP40	PDF
DS3109 Abstract: No abstract text available Text: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MV1445 PRELIMINARY INFORMATION DS3109 2.2 MV1445 COMBINED PCM HDB3 DECODER, DIGITAL CLOCK REGENERATOR AND TIMESLOT ZERO RECEIVER The MV1445 combines the HDB3 Decoder, Digital Clock	Original	MV1445 DS3109 MV1445 048Mbit	PDF
24.576 MHz 3.3V Abstract: No abstract text available Text: O CH9420 CHRONTEL Digital Audio Clock Generator Features Description • Supports clock frequencies for digital audio applications CH9420 is a dual PLL clock generator designed for digital audio applications. Four buffered fixedfrequency clocks are generated: a 14.318 MHz	OCR Scan	CH9420 CH9420 CH6357. TGG4133 CH9420A CH9420A-N CH9420A-S CH9420A-N-L CH9420A-S-L 24.576 MHz 3.3V	PDF
TC9236AF Abstract: TC9246F TC9245F TC9245N TC9246P TC9246 lc oscillator Text: TOSHIBA TC9246F/P CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC9246F, TC9246P PLL IC FOR DIGITAL AUDIO TC9246F, TC9246P are a clock generating 1C to generate TC9246F master clock required for a system. FEATURES • When reference clock is input, master clock required for	OCR Scan	TC9246F/P TC9246F, TC9246P TC9246P TC9245F, TC9245N OP16-P-300-1 705TYP TC9236AF TC9246F TC9245F TC9245N TC9246 lc oscillator	PDF
TC9236AF Abstract: TC9246F 1 phase inverter with lc filter TC9236 TC9245F TC9245N TC9246P Text: TO SH IBA TC9246F/P CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC9246F, TC9246P PLL IC FOR DIGITAL AUDIO TC9246F, TC9246P are a clock generating 1C to generate master clock required for a system. FEATURES • When reference clock is input, master clock required for	OCR Scan	TC9246F/P TC9246F, TC9246P TC9246P TC9245F, TC9245N TC9236AF TC9246F 1 phase inverter with lc filter TC9236 TC9245F TC9245N	PDF
MM5382 Abstract: MM5383 M5382 Text: M M 5 3 8 2 , M M 5 3 8 3 digital calendar clock radio circuits general description • Leading zero blanking The MM5382 and MM5383 digital calendar clock circuits provide the tim ing, control, and interface circuitry fo r a minim um-cost, solid state, digital clock	OCR Scan	MM5382 MM5383 12-hour 24-hour 59-minute 24-hour-7 M5382	PDF
TB1204N Abstract: lc oscillator TB1204F Text: TOSHIBA TC9246F/P CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC9246F, TC9246P PLL IC FOR DIGITAL A U D IO TC9246F, TC9246P are a clock generating 1C to generate TC9246F master clock required for a system. FEATURES • When reference clock is input, master clock required for	OCR Scan	TC9246F/P TC9246F, TC9246P TC9246P TC9246F TC9245F, TC9245N 384fs TB1204N lc oscillator TB1204F	PDF
Untitled Abstract: No abstract text available Text: •J» GOULD T1 /CEPT Digital Trunk PLL Electronics Preliminary Data Sheet COMMUNI CATION S8940 Digital Trunk Transmission Links • ST-BUS Clock and Frame Pulse source Features • Provides T1 clock at 1.544 MHz locked to input frame pulse • Sources CEPT 30 + 2 Digital Trunk/ST-BUS clock	OCR Scan	S8940 S8940 sync940	PDF

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DIGITAL CLOCK DESIGN Search Results

DIGITAL CLOCK DESIGN Result Highlights (5)

DIGITAL CLOCK DESIGN Datasheets Context Search

SAA7115

24bit rgb input to 8bit ITU output

sl-1042-30t DISPLAY

ICS421-05

ICS421-05

24 pin camera

24 pin camera

AN1405

CLK180

transistor a1m

Untitled

Untitled

DS1375

AN282

digital alarm clock

phase detector in RTL

HDB3

DS3109

24.576 MHz 3.3V

TC9236AF

TC9236AF

MM5382

TB1204N

Untitled