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    DIGITAL CLOCK IN PCB Search Results

    DIGITAL CLOCK IN PCB Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S149AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S549FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / HTSSOP28 Visit Toshiba Electronic Devices & Storage Corporation

    DIGITAL CLOCK IN PCB Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    ICS660

    Abstract: ICS660GI ICS660GILF ICS660GILFT ICS660GIT ICS661
    Text: ICS660 Digital Video Clock Source Description Features The ICS660 provides clock generation and conversion for clock rates commonly needed in digital video equipment, including rates for MPEG, NTSC, PAL, and HDTV. The ICS660 uses the latest PLL technology to


    Original     		ICS660 ICS660 ICS661. 16-pin ICS660GI ICS660GILF ICS660GILFT ICS660GIT ICS661 PDF

    ICS664G-03LF

    Abstract: ICS660 ICS661 ICS664-01 ICS664-02 ICS664-03 ICS664G-03 ICS664G-03T LP2985
    Text: ICS664-03 Digital Video Clock Source Description Features The ICS664-03 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The ICS664-03 uses the latest PLL technology to provide excellent phase noise and


    Original     		ICS664-03 ICS664-03 ICS664-01 ICS664-02. ICS661. 16-pin ICS664G-03LF ICS660 ICS661 ICS664-02 ICS664G-03 ICS664G-03T LP2985 PDF

    ICS660

    Abstract: ICS660GI ICS661
    Text: DATASHEET ICS660 DIGITAL VIDEO CLOCK SOURCE Description Features The ICS660 provides clock generation and conversion for clock rates commonly needed in digital video equipment, including rates for MPEG, NTSC, PAL, and HDTV. The ICS660 uses the latest PLL technology to provide excellent


    Original     		ICS660 ICS660 ICS661. 16-pin ICS660GI ICS661 PDF

    ICS660

    Abstract: ICS661 ICS664-01 ICS664-02 ICS664-03 LP2985 664G03LF 664g-03lf
    Text: DATASHEET ICS664-03 DIGITAL VIDEO CLOCK SOURCE Description Features The ICS664-03 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The ICS664-03 uses the latest PLL technology to provide excellent phase noise and long term jitter


    Original     		ICS664-03 ICS664-03 ICS664-01 ICS664-02. ICS661. ICS660 ICS661 ICS664-02 LP2985 664G03LF 664g-03lf PDF

    ICS664-05

    Abstract: ICS664G-05 ICS664G-05LF ICS660 ICS661 ICS664-01 ICS664-02 ICS664G-05T LP2985
    Text: PRELIMINARY DATASHEET ICS664-05 DIGITAL VIDEO CLOCK SOURCE Description Features The ICS664-05 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The ICS664-05 uses the latest PLL technology to provide excellent phase noise and long term jitter


    Original     		ICS664-05 ICS664-05 ICS664-01 ICS664-02. ICS661. ICS664G-05 ICS664G-05LF ICS660 ICS661 ICS664-02 ICS664G-05T LP2985 PDF

    ICS660

    Abstract: ICS661 ICS664-01 LP2985 664G-01
    Text: DATASHEET ICS664-01 DIGITAL VIDEO CLOCK SOURCE Description Features The ICS664-01 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The ICS664-01 uses the latest PLL technology to provide excellent phase noise and long term jitter


    Original     		ICS664-01 ICS664-01 ICS661. 16-pin ICS660 ICS661 LP2985 664G-01 PDF

    664G02LF

    Abstract: ICS661 ICS664-02 LP2985 ICS660 664G-02LFT hd-sdi pcb layout
    Text: DATASHEET ICS664-02 PECL DIGITAL VIDEO CLOCK SOURCE Description Features The ICS664-02 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The ICS664-02 uses the latest Phase-Locked Loop PLL technology to provide excellent phase noise


    Original     		ICS664-02 ICS664-02 ICS661. 16-pin 664G02LF ICS661 LP2985 ICS660 664G-02LFT hd-sdi pcb layout PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY DATASHEET ICS664-05 DIGITAL VIDEO CLOCK SOURCE Description Features The ICS664-05 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The ICS664-05 uses the latest PLL technology to provide excellent phase noise and long term jitter


    Original     		ICS664-05 ICS664-01 ICS664-02. ICS661. PDF

    XAPP462

    Abstract: written XC3S1000-FT256 XC3S1000-FT256-4 XC3S1000FT256 digital clock vhdl code simple diagram for digital clock xilinx vhdl code for digital clock CLK180 DS099
    Text: Application Note: Spartan-3 and Spartan-3L FPGA Families Using Digital Clock Managers DCMs in Spartan-3 FPGAs R XAPP462 (v1.1) January 5, 2006 Summary Digital Clock Managers (DCMs) provide advanced clocking capabilities to Spartan -3 FPGA applications. DCMs optionally multiply or divide the incoming clock frequency to synthesize a


    Original     		XAPP462 com/bvdocs/appnotes/xapp268 XAPP622: com/bvdocs/appnotes/xapp622 XAPP462 written XC3S1000-FT256 XC3S1000-FT256-4 XC3S1000FT256 digital clock vhdl code simple diagram for digital clock xilinx vhdl code for digital clock CLK180 DS099 PDF

    ED31 diode

    Abstract: No abstract text available
    Text: 5 kV, 6-Channel, SPIsolator Digital Isolator for SPI with Delay Clock ADuM4150 Data Sheet FUNCTIONAL BLOCK DIAGRAM Supports up to 40 MHz SPI clock speed in delay clock mode Supports up to 17 MHz SPI clock speed in 4-wire mode 4 high speed, low propagation delay, SPI signal isolation


    Original     		ADuM4150 20-lead ADuM4150BRIZ ADuM4150BRIZ-RL EVAL-ADuM3150Z ED31 diode PDF

    ICS3771

    Abstract: 3771 ICS3771-18 ICS661
    Text: DATASHEET ICS3771-18 DTV, STB CLOCK SOURCE Description Features The ICS3771-18 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The ICS3771-18 uses the latest PLL technology to provide excellent phase noise


    Original     		ICS3771-18 ICS3771-18 ICS661. 16-pin CY24204-3 ICS3771 3771 ICS661 PDF

    DSX321G

    Abstract: No abstract text available
    Text: Datasheet Built in VCXO, Spread-Spectrum Clock Generator BU3087FV ●Description BU3087FV has built in VCXO that is necessary for the Digital-TV signal reception. Connecting 27MHz crystal oscillator generates clock signals to 74.25MHz for Hi-Vision. BU3087FV has built in Spread-Spectrum function too.


    Original     		BU3087FV BU3087FV 27MHz 25MHz SSOP-B16 105ppm 180psec DSX321G PDF

    MK1725

    Abstract: MK1725GLF MK1725GLFT
    Text: DATASHEET MK1725 QUAD OUTPUT SPREAD SPECTRUM CLOCK GENERATOR Description Features The MK1725 generates 4 high-quality, high-frequency spread spectrum clock outputs. It is designed to replace spread spectrum clock generators and a buffer in many digital consumer applications. Using IDT’s patented Phase


    Original     		MK1725 MK1725 16-pin MK1725GLF MK1725GLFT PDF

    1080p30 to 625p

    Abstract: LM7711 DSA71604 LMH1983 TCXO 14.85 27 mhz oscillator VCXO 27MHZ HSYNC
    Text: LMH1983 3G/HD/SD Video Clock Generator with Audio Clock General Description Features The LMH1983 is a highly-integrated programmable audio/ video A/V clock generator intended for broadcast and professional applications. It can replace multiple PLLs and VCXOs used in applications supporting SMPTE serial digital video


    Original     		LMH1983 LMH1983 1080p30 to 625p LM7711 DSA71604 TCXO 14.85 27 mhz oscillator VCXO 27MHZ HSYNC PDF

    720P59

    Abstract: LMH1983 LM7711
    Text: LMH1983 LMH1983 3G/HD/SD Video Clock Generator with Audio Clock Literature Number: SNLS309G LMH1983 3G/HD/SD Video Clock Generator with Audio Clock General Description Features The LMH1983 is a highly-integrated programmable audio/ video A/V clock generator intended for broadcast and professional applications. It can replace multiple PLLs and VCXOs used in applications supporting SMPTE serial digital video


    Original     		LMH1983 LMH1983 SNLS309G 720P59 LM7711 PDF

    LM7711

    Abstract: lmh1983 1080p30 to 625p DSA71604 720p25 720P59 9438 diode 1080i25 tcxo 27MHz VCXO 27MHZ HSYNC
    Text: May 11, 2010 LMH1983 3G/HD/SD Video Clock Generator with Audio Clock General Description Features The LMH1983 is a highly-integrated programmable audio/ video A/V clock generator intended for broadcast and professional applications. It can replace multiple PLLs and VCXOs used in applications supporting SMPTE serial digital video


    Original     		LMH1983 LMH1983 LM7711 1080p30 to 625p DSA71604 720p25 720P59 9438 diode 1080i25 tcxo 27MHz VCXO 27MHZ HSYNC PDF

    TCXO 24.576MHz

    Abstract: No abstract text available
    Text: April 28, 2010 LMH1983 3G/HD/SD Video Clock Generator with Audio Clock General Description Features The LMH1983 is a highly-integrated programmable audio/ video A/V clock generator intended for broadcast and professional applications. It can replace multiple PLLs and VCXOs used in applications supporting SMPTE serial digital video


    Original     		LMH1983 TCXO 24.576MHz PDF

    XAPP268

    Abstract: vhdl code for DCM vhdl code for phase shift xapp 268 X268 dcm verilog code
    Text: Application Note: Virtex-II Series R Active Phase Alignment Author: Nick Sawyer XAPP268 v1.2 December 9, 2002 Summary The Digital Clock Manager (DCM) in the Virtex -II series of FPGAs is an extremely powerful logic element. It allows fine phase adjustment of an incoming clock in increments of around


    Original     		XAPP268 XAPP268 vhdl code for DCM vhdl code for phase shift xapp 268 X268 dcm verilog code PDF

    MDIO clause 45

    Abstract: C004 1102 3C003 141156 41178 C00B C8051F310 IC CX4 connector pinout 10GBASE-CX4 C004
    Text: ISL35822 Data Sheet June 29, 2005 FN6165.0.0 Octal 2.488Gbps to 3.187Gbps/ Lane Retimer • 0.13mm Pure-Digital CMOS Technology Features • Clock Compensation • 8 Lanes of Clock & Data Recovery and Retiming; 4 in Each Direction • Tx/Rx Rate Matching via IDLE Insertion/Deletion up to


    Original     		ISL35822 FN6165 488Gbps 187Gbps/ 100ppm 1875Gbps, 244Gbps 59325Gbps 163mW MDIO clause 45 C004 1102 3C003 141156 41178 C00B C8051F310 IC CX4 connector pinout 10GBASE-CX4 C004 PDF

    crpa

    Abstract: 49181 A01F 41178 c018 C8051F310 IC CX4 connector pinout square d 9007 10GBASE-CX4 BBT3821
    Text: BBT3821 Data Sheet July 20, 2005 FN7483.2 Octal 2.488Gbps to 3.187Gbps/ Lane Retimer • 0.13mm Pure-Digital CMOS Technology Features • Clock Compensation • 8 Lanes of Clock & Data Recovery and Retiming; 4 in Each Direction • Tx/Rx Rate Matching via IDLE Insertion/Deletion up to


    Original     		BBT3821 FN7483 488Gbps 187Gbps/ 100ppm 1875Gbps, 244Gbps 59325Gbps 195mW crpa 49181 A01F 41178 c018 C8051F310 IC CX4 connector pinout square d 9007 10GBASE-CX4 BBT3821 PDF

    SC3042B

    Abstract: No abstract text available
    Text: Preliminary SC3042B • • • • • Quartz SAW Frequency Stability Fundamental Fixed Frequency Very Low Jitter and Power Consumption Rugged, Miniature, Surface-Mount Case Low-Voltage Power Supply 3.3 VDC 624.0 MHz Differential Sine-Wave Clock This digital clock is designed for use in high-speed communications timing systems. Fundamental-mode


    Original     		SC3042B SC3042B PDF

    Untitled

    Abstract: No abstract text available
    Text: Agilent 81100 Family of Pulse/Pattern Generators Dual Clock Gbit Chip Test Technical Overview, Version 2.0 Introduction Agilent Technologies pulse generators are a necessity in the world of semiconductor test clocks and digital communication clocks. Many customers need the ability to generate more than one clock signal simultaneously and at multiple frequencies. The


    Original     		1150A 1150A BP2-19-13) 5991-2247EN PDF

    SM0402

    Abstract: sm3126 Low IF receiver CVHD-950-100 p981 LP3878MR-ADJ no 870 b 2nf 100PF 22PF RD-170
    Text: 1.0 Design Description The SP16130CH4RB Reference Board demonstrates a low IF receiver subsystem application including an ADC16V130 analog-to-digital converter ADC and LMK04031B clock conditioner which provides digitization and clocking as used in wireless infrastructure systems.


    Original     		SP16130CH4RB ADC16V130 LMK04031B ADC16V130. CSP-9-111S2) CSP-9-111S2. RD-170 SM0402 sm3126 Low IF receiver CVHD-950-100 p981 LP3878MR-ADJ no 870 b 2nf 100PF 22PF RD-170 PDF

    TMI 1480

    Abstract: pin configuration LCD 3.5-DIGIT 40 pin configuration LCD 3.5-DIGIT ic sj 2025
    Text: O K I Semiconductor MSM5052-01 Thermometer with Clock Function GENERAL DESCRIPTION The MSM5052-01 is an IC equipped with a digital thermometer possessing a temperature alarm, and a clock function. This device uses a thermistor as its sensing element, is able to sense temperatures in the range


    OCR Scan     		MSM5052-01 MSM5052-01 80-PIN QFP80-P-1420-K QFP84-P-1420-BK TMI 1480 pin configuration LCD 3.5-DIGIT 40 pin configuration LCD 3.5-DIGIT ic sj 2025 PDF