sonar beamforming
Abstract: motorola 68000 architecture hall 503 911 assembly language programs for fft algorithm Adele ADSP filter algorithm implementation DTMF encoder sonar ranging example circuits basics motorola 68000 microprocessor Motorola 581
Text: DIGITAL SIGNAL PROCESSING APPLICATIONS USING THE ADSP-2100 FAMILY ANALOG DEVICES TECHNICAL REFERENCE BOOKS Published by Prentice Hall Analog-Digital Conversion Handbook Digital Signal Processing in VLSI Digital Signal Processing Applications Using the ADSP-2100 Family
|
Original
|
ADSP-2100
sonar beamforming
motorola 68000 architecture
hall 503 911
assembly language programs for fft algorithm
Adele
ADSP filter algorithm implementation
DTMF encoder
sonar ranging example circuits basics
motorola 68000 microprocessor
Motorola 581
|
PDF
|
dsp in sonar
Abstract: sonar TMS320C31
Text: DELPH -SONAR: Digital Storage and Processing for Side-Scan Sonar Data by Elics Software Overview The DELPH-SONAR system can be interfaced with a wide range of tow fish thus allowing the digital storage and the display of the information collected. DELPH-SONAR, based on a PC architecture, uses a plug-in DSP digital signal processor board for acquisition and processing
|
Original
|
|
PDF
|
Harris DG303
Abstract: The CS5336 uses two die in a 28 pin package cs5390 thermistor CS5016 seminar Applications ANALOG DIGITAL 28 PIN Design speed design seminar dg303 Crystal Applications Seminar CS5014
Text: DATA ACQUISITION SEMINAR Applications Seminar Agenda - Section II • Introduction and Welcome • Introduction to Analog-to-Digital Converters • Analog-to-Digital Converter Topologies • Measurement, Testing and Troubleshooting • ∆Σ Digital-to-Analog Converters
|
Original
|
deve330
CS5336
CS5330
Harris DG303
The CS5336 uses two die in a 28 pin package
cs5390
thermistor CS5016
seminar Applications
ANALOG DIGITAL 28 PIN
Design speed design seminar
dg303
Crystal Applications Seminar
CS5014
|
PDF
|
CDBCAPTURE plus
Abstract: CS5101A-16 CS5101A CS5508 seminar Applications crystal seminar Crystal Applications Seminar
Text: DATA ACQUISITION SEMINAR Applications Seminar Agenda - Section IV • Introduction and Welcome • Introduction to Analog-to-Digital Converters • Analog-to-Digital Converter Topologies • Measurement, Testing and Troubleshooting • ∆Σ Digital-to-Analog Converters
|
Original
|
16-bit
CDBCAPTURE plus
CS5101A-16
CS5101A
CS5508
seminar Applications
crystal seminar
Crystal Applications Seminar
|
PDF
|
AD6624AS
Abstract: AD6600 AD6624A AD6624AABC AD6640 AD6644 AD9042 IS136 PICO base station
Text: a Four-Channel, 100 MSPS Digital Receive Signal Processor RSP AD6624A FEATURES 100 MSPS Wideband Inputs (14 Linear Bits Plus 3 RSSI) Dual High-Speed Data Input Ports Four Independent Digital Receivers in Single Package Digital Resampling for Noninteger Decimation Rates
|
Original
|
AD6624A
IS136,
C02756
AD6624AS
AD6600
AD6624A
AD6624AABC
AD6640
AD6644
AD9042
IS136
PICO base station
|
PDF
|
SUM22
Abstract: No abstract text available
Text: HSP43891/883 Data Sheet May 1999 File Number 2451.4 Digital Filter Features The HSP43891/883 is a video-speed Digital Filter DF designed to efficiently implement vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded
|
Original
|
HSP43891/883
HSP43891/883
26bit
SUM22
|
PDF
|
dc-ac inverter PURE SINE WAVE schematic diagram
Abstract: mp3 player schematic diagram 5.1 home theatre circuit diagram for project AD9042 MIP 2f2 permanent magnet synchronous generator 2MW PWM matlab Toshiba MRI Scanner ad7730 pcb circuit example 49mhz remote control transmitter circuit
Text: MIXED-SIGNAL AND DSP DESIGN TECHNIQUES a ANALOG DEVICES TECHNICAL REFERENCE BOOKS PUBLISHED BY PRENTICE HALL Analog-Digital Conversion Handbook Digital Signal Processing Applications Using the ADSP-2100 Family Volume 1:1992, Volume 2:1994 Digital Signal Processing in VLSI
|
Original
|
ADSP-2100
ADSP-2101
ADSP-21000
IADSP-2116x,
ADSP-2181/3,
ADSP-2183,
ADSP-2184/L,
ADSP-2185/L/M,
ADSP-2185L/86L,
dc-ac inverter PURE SINE WAVE schematic diagram
mp3 player schematic diagram
5.1 home theatre circuit diagram for project
AD9042
MIP 2f2
permanent magnet synchronous generator 2MW
PWM matlab
Toshiba MRI Scanner
ad7730 pcb circuit example
49mhz remote control transmitter circuit
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Four-Channel, 100 MSPS Digital Receive Signal Processor RSP AD6624A a FEATURES 100 MSPS Wideband Inputs (14 Linear Bits Plus 3 RSSI) Dual High-Speed Data Input Ports Four Independent Digital Receivers in Single Package Digital Resampling for Noninteger Decimation Rates
|
Original
|
AD6624A
IS136,
C02756â
|
PDF
|
SUM22
Abstract: sum24 SUM23
Text: HSP43881/883 Data Sheet May 1999 File Number 2449.4 Digital Filter Features The HSP43881/883 is a video speed Digital Filter DF designed to efficiently implement vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded
|
Original
|
HSP43881/883
HSP43881/883
26-bit
SUM22
sum24
SUM23
|
PDF
|
Untitled
Abstract: No abstract text available
Text: a Four-Channel, 100 MSPS Digital Receive Signal Processor RSP AD6624A FEATURES 100 MSPS Wideband Inputs (14 Linear Bits Plus 3 RSSI) Dual High-Speed Data Input Ports Four Independent Digital Receivers in Single Package Digital Resampling for Noninteger Decimation Rates
|
Original
|
AD6624A
IS136,
C02756â
|
PDF
|
SDFe3
Abstract: AD9042 c code for interpolation and decimation filter SDFE-1 Sdf-s01 AD6624AS AD6600 AD6624 AD6624ABC AD6640
Text: a Four-Channel, 80 MSPS Digital Receive Signal Processor RSP AD6624 FEATURES 80 MSPS Wide Band Inputs (14 Linear Bits Plus 3 RSSI) Dual High-Speed Data Input Ports Four Independent Digital Receivers in Single Package Digital Resampling for Noninteger Decimation Rates
|
Original
|
AD6624
IS136,
C02395
SDFe3
AD9042
c code for interpolation and decimation filter
SDFE-1
Sdf-s01
AD6624AS
AD6600
AD6624
AD6624ABC
AD6640
|
PDF
|
AD6624AS
Abstract: MOTOROLA 934 AD6600 AD6624 AD6640 AD6644 AD9042 IS136 0X96
Text: a Four-Channel, 80 MSPS Digital Receive Signal Processor RSP AD6624 FEATURES 80 MSPS Wide Band Inputs (14 Linear Bits Plus 3 RSSI) Dual High-Speed Data Input Ports Four Independent Digital Receivers in Single Package Digital Resampling for Noninteger Decimation Rates
|
Original
|
AD6624
IS136,
C01837
AD6624AS
MOTOROLA 934
AD6600
AD6624
AD6640
AD6644
AD9042
IS136
0X96
|
PDF
|
AD6624AS
Abstract: AD6600 AD6624 AD6640 AD6644 AD9042 IS136 SDFE-2 SDIN11
Text: a Four-Channel, 80 MSPS Digital Receive Signal Processor RSP AD6624 FEATURES 80 MSPS Wide Band Inputs (14 Linear Bits Plus 3 RSSI) Dual High Speed Data Input Ports Four Independent Digital Receivers in Single Package Digital Resampling for Noninteger Decimation Rates
|
Original
|
AD6624
IS136,
C02395
AD6624AS
AD6600
AD6624
AD6640
AD6644
AD9042
IS136
SDFE-2
SDIN11
|
PDF
|
dual slope adc icl7106
Abstract: ICL7106 INTERNAL STRUCTURE half flash adc application of dual slope adc dual slope adc AN2094 APP2094 ICL7106 MAX153
Text: Maxim/Dallas > App Notes > A/D and D/A CONVERSION/SAMPLING CIRCUITS PROCESSING HIGH-SPEED SIGNAL Keywords: ADCs, analog-to-digital converter, integrating, SAR, sigma delta, flash, pipeline, dual slope, two step, analog to digital conversions, analog digital, converters, half flash, ADC, comparison matrix, over
|
Original
|
com/an2094
ICL7106:
MAX153:
AN2094,
APP2094,
Appnote2094,
dual slope adc icl7106
ICL7106 INTERNAL STRUCTURE
half flash adc
application of dual slope adc
dual slope adc
AN2094
APP2094
ICL7106
MAX153
|
PDF
|
|
|
AD6624AS
Abstract: cic filter AD6600 AD6624 AD9042 IS136 SDFE-2 SDFE-1
Text: Four-Channel, 80 MSPS Digital Receive Signal Processor RSP a PRELIMINARY TECHNICAL DATA FEATURES 80 MSPS Wide Band Inputs (14 linear bit plus 3 RSSI) Dual High Speed Data Input Ports Four Independent Digital Receivers in single package Digital Re-sampling for non-Integer Decimation rates
|
Original
|
AD6624
AD6624AS
cic filter
AD6600
AD6624
AD9042
IS136
SDFE-2
SDFE-1
|
PDF
|
HSP43891
Abstract: HSP43891GC-20 HSP43891GC-25 HSP43891JC-20 HSP43891JC-25 HSP43891JC-30 HSP43891VC-20 HSP43891VC-25 HSP43891VC-30 DIN08
Text: HSP43891 TM Data Sheet May 1999 Digital Filter Features The HSP43891 is a video-speed Digital Filter DF designed to efficiently implement vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded internally and a shift and add output stage, all in
|
Original
|
HSP43891
HSP43891
26-bit
30MHz.
240MHz.
FN2785
HSP43891GC-20
HSP43891GC-25
HSP43891JC-20
HSP43891JC-25
HSP43891JC-30
HSP43891VC-20
HSP43891VC-25
HSP43891VC-30
DIN08
|
PDF
|
SDFE-1
Abstract: No abstract text available
Text: Four-Channel, 80 MSPS Digital Receive Signal Processor RSP a PRELIMINARY TECHNICAL DATA FEATURES 80 MSPS Wide Band Inputs (14 linear bit plus 3 RSSI) Dual High Speed Data Input Ports Four Independent Digital Receivers in single package Digital Re-sampling for non-Integer Decimation rates
|
Original
|
IS136,
AD6624
SDFE-1
|
PDF
|
HSP43891
Abstract: HSP43891GC-20 HSP43891GC-25 HSP43891GC-30 HSP43891JC-20 HSP43891JC-25 HSP43891JC-30 HSP43891VC-20 HSP43891VC-25 HSP43891VC-30
Text: HSP43891 Data Sheet May 1999 Digital Filter Features The HSP43891 is a video-speed Digital Filter DF designed to efficiently implement vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded internally and a shift and add output stage, all in
|
Original
|
HSP43891
HSP43891
26-bit
30MHz.
240MHz.
HSP43891GC-20
HSP43891GC-25
HSP43891GC-30
HSP43891JC-20
HSP43891JC-25
HSP43891JC-30
HSP43891VC-20
HSP43891VC-25
HSP43891VC-30
|
PDF
|
rcf up 2121
Abstract: AD6624AS
Text: a Four-Channel, 80 MSPS Digital Receive Signal Processor RSP Preliminary Technical Data FEATURES 80 MSPS Wide Band Input (14 linear bit plus 3 RSSI) Dual High Speed Data Input Ports Four Independent Digital Receivers in single package Digital Re-sampling for non-Integer Decimation rates
|
Original
|
IS136,
128-Lead
rcf up 2121
AD6624AS
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Microprocessor DIGITAL SIGNAL PROCESSORS Digital signal processors, essentially high-speed microprocessors/microcomputers, are designed to execute computationally intensive signal processing algorithms. The 3 20 family of digital signal processors takes advantage of powerful DSP specific and general-purpose instruction
|
OCR Scan
|
J320C
J320E
J320E15
J32020
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DIGITAL VIDEO & DIGITAL SIGNAL PROCESSING IC Handbook GEC P L E S S E Y SEMICONDUCTORS Foreword GEC Plessey Semiconductors has substantially increased its activities in Digital Video developments since the last issue of this handbook in December 1993 . A
|
OCR Scan
|
115th
|
PDF
|
Untitled
Abstract: No abstract text available
Text: HSP43881/883 Data Sheet May 1999 File Num ber 2449.4 Digital Filter Features The HSP43881/883 is a video speed Digital Filter DF designed to efficiently implem ent vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded
|
OCR Scan
|
HSP43881/883
HSP43881/883
MIL-STD-883
26-bit
SUM24
100kHz
F10/2,
|
PDF
|
SUM22
Abstract: sum24 SUM23
Text: HSP43891/883 Data Sheet May 1999 File Num ber 2451.4 Digital Filter Features The HSP43891/883 is a video-speed Digital Filter DF designed to efficiently implem ent vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded
|
OCR Scan
|
HSP43891/883
HSP43891/883
26bit
204MHz.
HSP43891
SUM15
SUM12
SUM10
SUM22
sum24
SUM23
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 43G227 1 IHAS GGS3177 22T 33 HARRIS HSP43881 SEMICONDUCTOR Digital Filter January 1994 Features Description • Eight Filter Cells • 0 to 30MHz Sample Rate The HSP43881 is a video speed Digital Filter DF designed to efficiently implement vector operations such as FIR digital
|
OCR Scan
|
43G227
GGS3177
HSP43881
30MHz
HSP43881
26-bit
SUMO-25,
|
PDF
|
