DRW26 Search Results

Contextual Info: 2.5V QUADMUX DDR FLOW-CONTROL DEVICE WITH MUX/DEMUX/BROADCAST FUNCTIONS 8,192 x 40 x 4 16,384 x 40 x 4 32,768 x 40 x 4 • FEATURES • • • Choose from among the following memory organizations: IDT72T55248 - 8,192 words, 40-bits/word maximum, 4 Sequential

Contextual Info: ADVANCE INFORMATION 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 16 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • FEATURES: • • • • • • • • • • • • Choose from among the following memory density options:

Contextual Info: ADVANCE INFORMATION IDT72T51333 IDT72T51343 IDT72T51353 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • • FEATURES: • • • • • • • • • • • Choose from among the following memory density options:

IDT72V223

Abstract: IDT72V233 IDT72V243 IDT72V253 IDT72V263 IDT72V273 IDT72V283 IDT72V293 72V273
Contextual Info: PRELIMINARY 3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO IDT72V223, IDT72V233 IDT72V243, IDT72V253 IDT72V263, IDT72V273 IDT72V283, IDT72V293 512 x 18/1,024 x 9, 1,024 x 18/2,048 x 9 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9 8,192 x 18/16,384 x 9, 16,384 x 18/32,768 x 9

IDT72V36100

Abstract: IDT72V36110 IDT72V3640 IDT72V3650 IDT72V3660 IDT72V3670 IDT72V3680 IDT72V3690
Contextual Info: PRELIMINARY IDT72V3640, IDT72V3650 IDT72V3660, IDT72V3670 IDT72V3680, IDT72V3690 3.3V HIGH-DENSITY SUPERSYNC II 36-BIT FIFO 1,024 x 36, 2,048 x 36 4,096 x 36, 8,192 x 36 16,384 x 36, 32,768 x 36 FEATURES: • • • • • • • • Choose among the following memory organizations:Commercial

72T36125

Abstract: IDT72T36105 IDT72T36115 IDT72T36125 IDT72T3645 IDT72T3655 IDT72T3665 IDT72T3675 IDT72T3685 IDT72T3695
Contextual Info: PRELIMINARY 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS IDT72T3645, IDT72T3655, IDT72T3665, IDT72T3675, IDT72T3685, IDT72T3695, IDT72T36105, IDT72T36115, IDT72T36125 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36

Contextual Info: 2.5 VOLT HIGH-SPEED TeraSync FIFO IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,

IDT72T3645

Abstract: 72T36125
Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36 FEATURES: • • • • • • • • • • • • • Choose among the following memory organizations:

18320

Contextual Info: IDT72V15160 IDT72V16160 IDT72V17160 IDT72V18160 IDT72V19160 3.3V MULTIMEDIA FIFO 16 BIT V-III, 32 BIT Vx-III FAMILY UP TO 1 Mb DENSITY • • • FEATURES: • • • • Choose among the following memory organizations: Commercial • V-III Vx-III IDT72V15160 - 4,096 x 16

72V36100

Abstract: 72V36110 IDT72V36100 IDT72V36110
Contextual Info: 3.3 VOLT HIGH-DENSITY SUPERSYNC II 36-BIT FIFO IDT72V36100 IDT72V36110 65,536 x36 131,072 x 36 FEATURES: • • • • • • • • • • Choose among the following memory organizations:Commercial IDT72V36100  65,536 x 36 IDT72V36110  131,072 x 36

IDT723624

Abstract: IDT723634 IDT723644
Contextual Info: CMOS SyncBiFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 FEATURES: • • • • • • • Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8 ns access time

IDT72V51433

Abstract: IDT72V51443 IDT72V51453
Contextual Info: 3.3V MULTI-QUEUE FLOW-CONTROL DEVICES 16 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits • • • • FEATURES: • • • • • • • • • • Choose from among the following memory density options: IDT72V51433  Total Available Memory = 589,824 bits

D1825

Abstract: d1833 AN-265 D1531
Contextual Info: APPLICATION NOTE AN-265 BUS MATCHING WITH IDT FIFOs BUS MATCHING The following diagrams show how an external byte-oriented bus should be mapped to the 9-bit oriented FIFO. The Bus Matching feature offered in the SuperSync II family is a powerful feature designed to eliminate external MUXes. When used in applications where

IDT72T55248

Abstract: IDT72T55258 IDT72T55268
Contextual Info: 2.5V QUADMUX DDR FLOW-CONTROL DEVICE WITH MUX/DEMUX/BROADCAST FUNCTIONS 8,192 x 40 x 4 16,384 x 40 x 4 32,768 x 40 x 4 FEATURES • • • • Choose from among the following memory organizations: IDT72T55248 - 8,192 words, 40-bits/word maximum, 4 Sequential

IDT72T54242

Abstract: IDT72T54252 IDT72T54262 72T54242
Contextual Info: 2.5V QUAD/DUAL TeraSync DDR/SDR FIFO x10 QUAD FIFO or x10/x20 DUAL FIFO CONFIGURATIONS 32,768 x 10 x 4/16,384 x 20 x 2 65,536 x 10 x 4/32,768 x 20 x 2 131,072 x 10 x 4/65,536 x 20 x 2 FEATURES • • • • • • • Choose from among the following memory organizations:

D39-0

Contextual Info: 2.5V MULTI-QUEUE DDR FLOW-CONTROL DEVICES 40 BITS WIDE WITH FIXED 4 QUEUES 8,192 x 40 x 4, 16,384 x 40 x 4 and 32,768 x 40 x 4 • • • FEATURES • • • • • • • • • • • The multi-queue DDR flow-control device contains 4 Queues each queue has a fixed size of:

72V11165

Abstract: IDT72V11165 IDT72V12165 IDT72V13165 IDT72V14165 IDT72V15165
Contextual Info: 3.3 VOLT MULTIMEDIA FIFO 256 x 16, 512 x 16, 1,024 x 16, 2,048 x 16, and 4,096 x 16 IDT72V11165, IDT72V12165 IDT72V13165, IDT72V14165 IDT72V15165 FEATURES DESCRIPTION • • • The IDT72V11165/72V12165/72V13165/72V14165/72V15165 devices are First-In, First-Out FIFO memories with clocked read and write controls.

Contextual Info: 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 32 QUEUES 18 BIT WIDE CONFIGURATION 1,179,648 bits 2,359,296 bits • • • FEATURES: • • • • • • • • • • • • • Choose from among the following memory density options: IDT72T51543  Total Available Memory = 1,179,648 bits

Contextual Info: 3.3V MULTI-QUEUE FLOW-CONTROL DEVICES 32 QUEUES 36 BIT WIDE CONFIGURATION IDT72V51546 IDT72V51556 1,179,648 bits 2,359,296 bits • • FEATURES: • • • • • • • • • • • • Choose from among the following memory density options: IDT72V51546  Total Available Memory = 1,179,648 bits

Contextual Info: 3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO 131,072 x 18/262,144 x 9 262,144 x 18/524,288 x 9 FEATURES: • • • • • • • • • • • • • Choose among the following memory organizations: IDT72V2103 ⎯ 131,072 x 18/262,144 x 9 IDT72V2113 ⎯ 262,144 x 18/524,288 x 9

IDT72T18105

Abstract: IDT72T18115 IDT72T18125 IDT72T1845 IDT72T1855 IDT72T1865 IDT72T1875 IDT72T1885 IDT72T1895
Contextual Info: 2.5 VOLT HIGH-SPEED TeraSync FIFO IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,

D16-R4

Abstract: 72T4088 IDT72T40108 IDT72T40118 IDT72T4088 IDT72T4098
Contextual Info: 2.5 VOLT HIGH-SPEED TeraSync DDR/SDR FIFO 40-BIT CONFIGURATION 16,384 x 40, 32,768 x 40, 65,536 x 40, 131,072 x 40 IDT72T4088, IDT72T4098 IDT72T40108, IDT72T40118 FEATURES: • • • • • • • • • • • • • Choose among the following memory organizations:

IDT72V7250

Abstract: IDT72V7260 IDT72V7270 IDT72V7280 IDT72V7290 IDT72V72100 IDT72V7230 IDT72V7240 are d68 hf no 72V7250
Contextual Info: 3.3 VOLT HIGH-DENSITY SUPERSYNC II 72-BIT FIFO 512 x 72, 1,024 x 72 2,048 x 72, 4,096 x 72 8,192 x 72, 16,384 x 72 32,768 x 72, 65,536 x 72 • • • FEATURES: • • • • • • • Choose among the following memory organizations: IDT72V7230  512 x 72

IDT72T51336

Abstract: IDT72T51346 IDT72T51356
Contextual Info: PRELIMINARY IDT72T51336 IDT72T51346 IDT72T51356 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 36 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • FEATURES: • • • • • • • • • • • • Choose from among the following memory density options: