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    DTC17 Search Results

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    DTC17 Price and Stock

    SEI Stackpole Electronics Inc RGC0805DTC17K4

    RES 17.4K OHM 0.5% 1/8W 0805
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    DigiKey RGC0805DTC17K4 Reel 5,000
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    RGC0805DTC17K4 Cut Tape 1
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    RGC0805DTC17K4 Digi-Reel 1
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    Avnet Americas RGC0805DTC17K4 Reel 13 Weeks 5,000
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    NAC RGC0805DTC17K4 5,000
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    SEI Stackpole Electronics Inc RGC0805DTC178R

    RES 178 OHM 0.5% 1/8W 0805
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    DigiKey RGC0805DTC178R Reel 5,000
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    NAC RGC0805DTC178R 5,000
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    SEI Stackpole Electronics Inc RGC0603DTC17R8

    RES 17.8 OHM 0.5% 1/10W 0603
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    DigiKey RGC0603DTC17R8 Digi-Reel 1
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    RGC0603DTC17R8 Cut Tape 1
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    NAC RGC0603DTC17R8 5,000
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    SEI Stackpole Electronics Inc RNCF1210DTC174R

    RES SMD 174 OHM 0.5% 1/3W 1210
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    DigiKey RNCF1210DTC174R Reel 5,000
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    Avnet Americas RNCF1210DTC174R Reel 13 Weeks 5,000
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    NAC RNCF1210DTC174R 5,000
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    SEI Stackpole Electronics Inc RNCF1210DTC17R4

    RES SMD 17.4 OHM 0.5% 1/3W 1210
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    DigiKey RNCF1210DTC17R4 Reel 5,000
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    Avnet Americas RNCF1210DTC17R4 Reel 13 Weeks 5,000
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    NAC RNCF1210DTC17R4 5,000
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    Find more DTC17 price and stock on Findchips.com

    DTC17 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.


    Original     		PDF IXF6151 IXF6151 LXT6051 51Mb/s 155Mb/s GR-253-CORE.

    MTC27

    Abstract: 2x4 TTL demultiplexer 106 35K 045 226 35K AU-AIS Digital Alarm Clock by using ttl MTB 230 P03H GR-253-CORE IXF6151
    Text: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.


    Original     		PDF IXF6151 IXF6151 LXT6051 51Mb/s 155Mb/s GR-253-CORE. MTC27 2x4 TTL demultiplexer 106 35K 045 226 35K AU-AIS Digital Alarm Clock by using ttl MTB 230 P03H GR-253-CORE

    san francisco telecom

    Abstract: X1HB 001H MTC21 SXT6251 MTC11 MTD16 P1396 MTC13 MTC15
    Text: DATA SHEET MAY 1998 Revision 1.1 SXT6251 21 E1 SDH Mapper General Description Features The SXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom


    Original     		PDF SXT6251 SXT6251 SXT6051 san francisco telecom X1HB 001H MTC21 MTC11 MTD16 P1396 MTC13 MTC15

    Untitled

    Abstract: No abstract text available
    Text: Disc Thermostat, .500” Dia, Snap Action Features F−13 Loose Bracket, Stainless Steel Cap .250” Quick Connect Terminals Automatic Reset Enclosed Disc Surface Mount RoHS Compliant .960 24.4 1.220 (31.0) .250 (6.3) Quick Connect (2 Places) .020 (0.5)


    Original     		PDF 125VAC; 250VAC 500VDC 2000VAC DTO60 DTO85 DTC100 DTO110 DTO120 DTC120

    LXT6282

    Abstract: DTD17 MTC11 MTC15 header 3x2 LXT6251A intel C96 74HC04 LXT344 25X2
    Text: POWER.SCH POWER SUPPLIES MHICLK MHICLK J3 EXTCLKA EXTCLKA MHBCLK MHBCLK BNC-4 LXT6051.SCH J4 EXTCLKB MRESET EXTCLKB ALTSOH.sch BNC-4 MRESET MRESET J5 EXTCLKC MRESET EXTCLKC TSYNCCLKM TSYNCCLKM BNC-4 FPGA FOR SERIAL ACCESS TSYNCCLKM LXT6051A ORDERWIR.SCH TROWM


    Original     		PDF LXT6051 LXT6051A LDB6X51A 21-Dec-2000 LXT6282 DTD17 MTC11 MTC15 header 3x2 LXT6251A intel C96 74HC04 LXT344 25X2

    MTC27

    Abstract: 2x4 TTL demultiplexer Pentium MMX 166 Processor MTC13 KLM-1 DTC20 mtc10 VT1536 MTD23 MTD27
    Text: Intel IXF6151 28 T1/E1 Mapper Datasheet ® The Intel IXF6151 performs asynchronous mapping and demapping of 28 T1 and/or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface. Further


    Original     		PDF IXF6151 IXF6151 LXT6051 GR-253-CORE. MTC27 2x4 TTL demultiplexer Pentium MMX 166 Processor MTC13 KLM-1 DTC20 mtc10 VT1536 MTD23 MTD27

    2x4 TTL demultiplexer

    Abstract: No abstract text available
    Text: Intel IXF6151 28 T1/E1 Mapper Datasheet The Intel® IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus


    Original     		PDF IXF6151 IXF6151 LXT6051 GR-253-CORE. the41 2x4 TTL demultiplexer

    X1HB

    Abstract: MTC13 LXT625 131-G W J 50
    Text: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper LXT General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard


    Original     		PDF LXT6251 VC-12 VC-12s, PDS-6251-8/99-2 X1HB MTC13 LXT625 131-G W J 50

    DTC24

    Abstract: AU-AIS MTC27 vc-4 digital cross connect 226 35K 2x4 TTL demultiplexer Digital Alarm Clock by ttl Digital Alarm Clock by using ttl P03H GR-253-CORE
    Text: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.


    Original     		PDF IXF6151 IXF6151 LXT6051 51Mb/s 155Mb/s GR-253-CORE. DTC24 AU-AIS MTC27 vc-4 digital cross connect 226 35K 2x4 TTL demultiplexer Digital Alarm Clock by ttl Digital Alarm Clock by using ttl P03H GR-253-CORE

    X1HB

    Abstract: telecom bus DM9000 application Digital Alarm Clock by using ttl LXT6251A 001H LXT6051 MTD10 LXT6282 MTC11
    Text: LXT6251A 21 E1 SDH Mapper Datasheet The LXT6251A 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom bus interface. Further processing by the companion


    Original     		PDF LXT6251A LXT6251A LXT6051 X1HB telecom bus DM9000 application Digital Alarm Clock by using ttl 001H MTD10 LXT6282 MTC11

    Untitled

    Abstract: No abstract text available
    Text: P ro d u c t O vervie FEBRUARY 1998 Revision 1.0 SXT6251 21E1 Mapper General Description The SXT6251 21E1 Mapper performs asynchronous map­ ping and demapping of 21 E l PDH signals into SDH. The PDH side interfaces with E l LIU and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom


    OCR Scan     		PDF SXT6251 SXT6251 SXT6051 SXT6251,

    dtc12

    Abstract: No abstract text available
    Text: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E l PDH signals into SDH. The PDH side interfaces with E l LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard


    OCR Scan     		PDF LXT6251 LXT6251 LXT6051 VC-12 dtc12