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    DUAL AND GATE Search Results

    DUAL AND GATE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54HC51J/B Rochester Electronics LLC 54HC51 - Dual AND-OR Invert Gates Visit Rochester Electronics LLC Buy
    54H21W/C Rochester Electronics LLC 54H21 - Dual 4-Input POS-AND Gates Visit Rochester Electronics LLC Buy
    54F21/BCA Rochester Electronics LLC 54F21 - AND GATE, DUAL 4-INPUT - Dual marked (5962-8955401CA) Visit Rochester Electronics LLC Buy
    5451/BCA Rochester Electronics LLC 5451 - And-or-Invert Gate, Dual 2-Wide Visit Rochester Electronics LLC Buy
    5408/BDA Rochester Electronics LLC 5408 - AND GATE, QUAD 2-INPUT - Dual marked (M38510/01601BDA) Visit Rochester Electronics LLC Buy

    DUAL AND GATE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    UDN5713M

    Abstract: No abstract text available
    Text: 5713 5713 Data Sheet 29307B DUAL PERIPHERAL AND POWER DRIVER DUAL PERIPHERAL AND POWER DRIVER — TRANSIENT PROTECTED OUTPUTS This “mini-DlP” dual peripheral and power driver is a bipolar monolithic integrated circuit incorporating NOR logic gates, highcurrent switching transistors, and transient suppression diodes on the


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    29307B UDN5713M MA-001-8A PDF

    5740

    Abstract: GP-009
    Text: SERIES 5740 DUAL PERIPHERAL/POWER DRIVERS —TRANSIENT-PROTECTED OUTPUTS UDN5742M OUTKJT2 Peripheral and power drivers combining dual logic gates, highcurrent saturated output transistors, and transient-suppression diodes is the Series UDN5740M. These monolithic dual drivers surpass the


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    UDN5742M UDN5740M. 5740 GP-009 PDF

    F10210

    Abstract: F10211 F10610 F10611
    Text: F10210 F10211l/» F10610"* F10611 DUAL 3-3 OR • DUAL 3-3 NOR FlOK VOLTAGE COMPENSATED ECL GENERAL DESCRIPTION — The F10210 and F10610 are Dual 3-Input 3-O utput OR Gates and the F10211 and F10611 are Dual 3-Input 3-O utput NOR Gates. Each gate has three output transistors driven in parallel, with their emitters brought out on


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    F10210 Vl02111/* F10611 F10210and F10610 F10211 F10611 wir-38 F10210 PDF

    A7900

    Abstract: A7628 HJR 4102 relay 9789A GP-009 25CC UDN5741M UDN5742M UDN5743M UDN5744M
    Text: DUAL PERIPHERAL/POW ER D RIVERS TRANSIENT-PRO TECTED OUTPUTS — Peripheral and power drivers combining dual logic gates, high­ current saturated output transistors, and transient-suppression diodes is the Series UDN5740M . These monolithic dual drivers surpass the


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    UDN5742M -9790B -7900B A7900 A7628 HJR 4102 relay 9789A GP-009 25CC UDN5741M UDN5742M UDN5743M UDN5744M PDF

    CD4072BCN

    Abstract: CD4072BC CD4082BCN CD40828
    Text: CD4072BM/CD4072BC Dual 4-Input OR Gate, CD4082BM/CD4082BC Dual 4-Input AND Gate General Description Features These dual gates are m onolithic complementary MOS CMOS integrated circuits constructed with N-and P-channel enhancement mode transistors. They have


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    CD4072BM/CD4072BC, CD4082BM/CD4082BC CD4072BM/CD4072BC CD4082BM/CD4082BC 45VDD 54C/74C AN-90. CD4072BCN CD4072BC CD4082BCN CD40828 PDF

    EPT23

    Abstract: KPT23 MC100EPT23 MC100EPT23D MC100EPT23DR2 MC100EPT23DT
    Text: MC100EPT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate


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    MC100EPT23 MC100EPT23 EPT23 r14525 MC100EPT23/D KPT23 MC100EPT23D MC100EPT23DR2 MC100EPT23DT PDF

    Untitled

    Abstract: No abstract text available
    Text: F10210 F10211 F10610 F10611 DUAL 3-3OR • DUAL 3-3 NOR F10K VOLTAGE COMPENSATED ECL GENERAL DESCRIPTION — The F10210 and F10610 are Dual 3-Input 3-O utput OR Gates and the F10211 and F10611 are Dual 3-Input 3-O utput NOR Gates. Each gate has three output transistors driven in parallel, with their emitters brought out on


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    F10210 F10211 F10610 F10611 F10210 F10610 F10211 F10611 PDF

    Untitled

    Abstract: No abstract text available
    Text: TC7SP308WBG TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7SP308WBG Dual supply 2-Input AND Gate with Level Translator The TC7SP308 is a dual supply, advanced high-speed CMOS 2-input dual supply voltage interface AND gate fabricated with silicon gate CMOS technology.


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    TC7SP308WBG TC7SP308 S-WFBGA6-0102-0 40A01 PDF

    Untitled

    Abstract: No abstract text available
    Text: TC7SP308WBG TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7SP308WBG Dual supply 2-Input AND Gate with Level Translator The TC7SP308 is a dual supply, advanced high-speed CMOS 2-input dual supply voltage interface AND gate fabricated with silicon gate CMOS technology.


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    TC7SP308WBG TC7SP308 S-WFBGA6-0102-0 40A01 PDF

    KPT23

    Abstract: No abstract text available
    Text: MC100EPT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate


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    MC100EPT23 EPT23 MC100EPT23/D KPT23 PDF

    Untitled

    Abstract: No abstract text available
    Text: F10210 F10211l/» F10610^ F l O ô l l ^ DUAL 3-3 OR • DUAL 3-3 NOR F10K VOLTAGE COMPENSATED ECL GENERAL DESCRIPTION — The F10210 and F10610 are Dual 3-lnput 3-Output OR Gates and the F10211 and F10611 are Dual 3-Input 3-Output NOR Gates. Each gate has three output transistors driven in parallel, with their emitters brought out on


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    F10210 F10211l F10610^ F10210 F10610 F10211 F10611 PDF

    Untitled

    Abstract: No abstract text available
    Text: MC100EPT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate


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    MC100EPT23 EPT23 MC100EPT23/D PDF

    DASF001419

    Abstract: MC100ES60T23EFR2 MC100ES60T23EF MC100ES60T23 75107
    Text: MC100ES60T23 3.3V DUAL DIFFERENTIAL LVPECL TO LVTTL TRANSLATOR 3.3 V Dual Differential LVPECL to LVTTL Translator The MC100ES60T23 is a dual differential LVPECL-to-LVTTL translator. The low voltage PECL levels, small package, and dual gate design is ideal for clock


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    MC100ES60T23 MC100ES60T23 INFORMATIO8200 199707558G DASF001419 MC100ES60T23EFR2 MC100ES60T23EF 75107 PDF

    AZ100ELT22

    Abstract: ARIZONA MICROTEK
    Text: AZ100ELT22 Dual CMOS/TTL to Differential PECL Translator DESCRIPTION The AZ100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL Positive ECL levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual gate design of


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    AZ100ELT22 AZ100ELT22 MC100ELT22, MC100LVELT22 SY89322V 100ps ARIZONA MICROTEK PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate


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    MC100ELT23 ELT23 200mV DL140 PDF

    DL140

    Abstract: MC100ELT23
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate


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    MC100ELT23 MC100ELT23 ELT23 DL140 MC100ELT23/D* MC100ELT23/D PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate


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    MC100ELT23 MC100ELT23 ELT23 200mV b3b7252 DL140 PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate


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    MC100ELT23 MC100ELT23 ELT23 200mV DL140â PDF

    474PF

    Abstract: analog devices 118a jesd22-A115B AN1575 AN1596 ISL28233 ISL28233FUZ ISL28233SOICEVAL1Z ISL28433 ISL28433SOICEVAL1Z
    Text: Dual and Quad Micropower Chopper Stabilized, RRIO Operational Amplifiers ISL28233, ISL28433 Features The ISL28233 and ISL28433 are dual and quad micropower, chopper stabilized operational amplifiers that are optimized for single and dual supply operation from 1.65V to 6.0V and


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    ISL28233, ISL28433 ISL28233 ISL28433 474PF analog devices 118a jesd22-A115B AN1575 AN1596 ISL28233FUZ ISL28233SOICEVAL1Z ISL28433SOICEVAL1Z PDF

    4082B

    Abstract: TC4082BP HD14082B HFE4082BP scl4082 MC14082B M4082BP MB84082B MLC4082B MN4082B
    Text: - 4082B Dual 4 Input AND Gate 99 -


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    4082B NOROT4002, MSM4082BRS MLC4082B TC4082BP UPD4082BC HD14082B MB84082B MN4082B M4082BP TC4082BP HD14082B HFE4082BP scl4082 MC14082B M4082BP MB84082B MLC4082B MN4082B PDF

    la 5752

    Abstract: No abstract text available
    Text: 5752 DUAL PERIPHERAL AND POWER DRIVER -TRANSIENT-PROTECTED OUTPUTS Com bining dual AND logic gates, high-current switching transistors, and transient suppression diodes in a bipolar m onolithic integrated circuit, this peripheral and power driver meets interface requirem ents


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    UDN5752M UDN5752M la 5752 PDF

    Untitled

    Abstract: No abstract text available
    Text: BF1207 Dual N-channel dual gate MOSFET Rev. 2 — 7 September 2011 Product data sheet 1. Product profile 1.1 General description The BF1207 is a combination of two dual gate MOSFET amplifiers with shared source and gate2 leads and an integrated switch. The source and substrate are interconnected. Internal bias circuits enable Direct Current


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    BF1207 BF1207 OT363 PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D ifferential PECL to TTL Translator M C100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate


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    C100ELT23 MC100ELT23 ELT23 MC100ELT23/D PDF

    pin diagram of 3525

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D ifferential PECL to TTL Translator M C100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate


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    MC100ELT23 ELT23 200mV BR1330 pin diagram of 3525 PDF