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    DUAL D-TYPE FLIP-FLOP POSITIVE-EDGE TRIGGER Search Results

    DUAL D-TYPE FLIP-FLOP POSITIVE-EDGE TRIGGER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    HD74LS74ARP Renesas Electronics Corporation Dual D-Type Positive Edge-triggered Flip-Flops (with Preset and Clear), , / Visit Renesas Electronics Corporation
    TB67H480FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=2.5/ PHASE input type Visit Toshiba Electronic Devices & Storage Corporation
    TB67H481FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=2.5/ IN input type Visit Toshiba Electronic Devices & Storage Corporation
    TB67S580FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=1.6 Visit Toshiba Electronic Devices & Storage Corporation
    TB67S581FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=2.5 Visit Toshiba Electronic Devices & Storage Corporation

    DUAL D-TYPE FLIP-FLOP POSITIVE-EDGE TRIGGER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: IDT74ALVC74 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET IDT74ALVC74 DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced


    Original     		PDF IDT74ALVC74 SO14-1) SO14-2) SO14-3)

    LVC74A

    Abstract: No abstract text available
    Text: IDT74LVC74A 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O IDT74LVC74A DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced


    Original     		PDF IDT74LVC74A LVC74A

    XCLK33

    Abstract: No abstract text available
    Text: IDT74ALVC74 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP EXTENDED COMMERCIAL TEMPERATURE RANGE IDT74ALVC74 ADVANCE INFORMATION 3.3V CMOS DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. A low level at the preset PRE or


    Original     		PDF IDT74ALVC74 SO14-1) SO14-2) SO14-3) XCLK33

    74sc

    Abstract: 74F74
    Text: 54F74,74F74 54F74 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop Literature Number: SNOS214A 54F 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Military 74F74PC Package Number Features Y Guaranteed 4000V minimum ESD protection


    Original     		PDF 54F74 74F74 74F74 SNOS214A 74sc

    SN74LS74AM

    Abstract: SN74LS74A SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25
    Text: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q


    Original     		PDF SN74LS74A SN74LS74A r14525 SN74LS74A/D SN74LS74AM SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25

    SN74LS74AN

    Abstract: SN74LS74A SN74LS74AD
    Text: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q


    Original     		PDF SN74LS74A SN74LS74A r14153 SN74LS74A/D SN74LS74AN SN74LS74AD

    MNA423

    Abstract: 74LVC74
    Text: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification 2002 Nov 15 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74


    Original     		PDF 74ALVC74 JESD8B/JESD36 EIA/JESD22-A114-A EIA/JESD22-A115-A SCA74 613508/01/pp20 MNA423 74LVC74

    Untitled

    Abstract: No abstract text available
    Text: IDT74LVC74A 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O IDT74LVC74A FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology


    Original     		PDF IDT74LVC74A MIL-STD-883, 200pF, IDT74LVC74A

    74LV74

    Abstract: 74LV74PW 74LV74 Philips
    Text: INTEGRATED CIRCUITS 74LV74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification IC24 Data Handbook Philips Semiconductors 1996 Nov 07 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive edge-trigger


    Original     		PDF 74LV74 74LV74 74HC/HCT74. 74LV74PW 74LV74 Philips

    74ls74a

    Abstract: 751A-02
    Text: SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.


    Original     		PDF SN54/74LS74A 74LS74A 751A-02

    74LS74A

    Abstract: 751A-02
    Text: SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.


    Original     		PDF SN54/74LS74A 74LS74A 751A-02

    MNA423

    Abstract: 74LVC74A 74LVC74AD 74LVC74ADB 74LVC74APW
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Jun 17 2002 Jun 18 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge


    Original     		PDF 74LVC74A 74LVC74A SCA74 613508/03/pp20 MNA423 74LVC74AD 74LVC74ADB 74LVC74APW

    Untitled

    Abstract: No abstract text available
    Text: ADVANCED BiCMOS PRODUCTS MB2374 Dual octal D-type flip-flop; positive-edge trigger 3-State Product specification IC23 Philips Semiconductors August 23, 1993 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State)


    Original     		PDF MB2374 16-bit 64mA/â 500mA MB2374

    MB2374

    Abstract: Philips Semiconductors
    Text: ADVANCED BiCMOS PRODUCTS MB2374 Dual octal D-type flip-flop; positive-edge trigger 3-State Product specification IC23 Philips Semiconductors August 23, 1993 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State)


    Original     		PDF MB2374 16-bit 500mA MB2374 Philips Semiconductors

    Untitled

    Abstract: No abstract text available
    Text: SN54LVC74A, SN74LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS287H – JANUARY 1993 – REVISED JUNE 1998 D D description The SN54LVC74A dual positive-edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation and the SN74LVC74A dual positiveedge-triggered D-type flip-flop is designed for


    Original     		PDF SN54LVC74A, SN74LVC74A SCAS287H MIL-STD-883, SCBA010 SCBA011 SCEA005 SCAA029, SZZU001B, SDYU001N,

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC2G80 www.ti.com SCES309F – DECEMBER 2001 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop Check for Samples: SN74LVC2G80 FEATURES DESCRIPTION • This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.


    Original     		PDF SN74LVC2G80 SCES309F

    Untitled

    Abstract: No abstract text available
    Text: 54AC74,54ACT74 54AC74/54ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Literature Number: SNOS085B 54AC74/54ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q General Description


    Original     		PDF 54AC74 54ACT74 54AC74/54ACT74 SNOS085B ACT74

    Untitled

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD U74AC74 CMOS IC DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET „ DESCRIPTION The U74AC74 is a dual positive-edge-triggered D-type flip-flop. The preset PRE and clear ( CLR ) input can set or reset the


    Original     		PDF U74AC74 U74AC74 QW-R502-800

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC2G79 www.ti.com SCES498E – OCTOBER 2003 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop Check for Samples: SN74LVC2G79 FEATURES DESCRIPTION • This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.


    Original     		PDF SN74LVC2G79 SCES498E 24-mA

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC2G80 www.ti.com SCES309F – DECEMBER 2001 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop Check for Samples: SN74LVC2G80 FEATURES DESCRIPTION • This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.


    Original     		PDF SN74LVC2G80 SCES309F

    motorola act74

    Abstract: act74
    Text: M MOTOROLA M C74AC74 M C74ACT74 Product Preview Dual D-Type Positive Edge-Triggered Flip-Flop DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and com plem entary Q, Q) outputs. Information at the input is trans­


    OCR Scan     		PDF C74AC74 C74ACT74 MC74AC74/74ACT74 74ACT --40D motorola act74 act74

    Untitled

    Abstract: No abstract text available
    Text: 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification IC24 Data Handbook Philips Semiconductors 1998 Jun 17 PHILIPS PHILIPS Philips Semiconductors Product Specification Dual D-type flip-flop with set and reset; positive-edge trigger


    OCR Scan     		PDF 74LVC74A 74LVC74A

    T74LS74

    Abstract: T54LS74AD2
    Text: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q


    OCR Scan     		PDF T54LS/T74LS74A T74LS74 T54LS74AD2

    T74LS74AB1

    Abstract: T74LS74a T54LS74AD2 T74LS74
    Text: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q


    OCR Scan     		PDF T54LS/T74LS74A T74LS74AB1 T74LS74a T54LS74AD2 T74LS74