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    DV74ALS1 Search Results

    DV74ALS1 Datasheets (13)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    DV74ALS1005 Unknown Hex Inverting Drivers with Open Collector Outputs Scan PDF
    DV74ALS1011A Unknown Triple 3 Input AND Buffer Scan PDF
    DV74ALS109AN AVG Semiconductors Dual J-k Positive Edge Triggered Flip Flop Plastic Dip Through Hole Scan PDF
    DV74ALS125N AVG Semiconductors Quad Bus Buffer Gate (3 State) Plastic Dip Through Hole Scan PDF
    DV74ALS138N AVG Semiconductors 3-8 Decode/Demultiplexer Plastic Dip Through Hole Scan PDF
    DV74ALS139N AVG Semiconductors Dual 1-4 Decoder/Demultiplexer Plastic Dip Through Hole Scan PDF
    DV74ALS157N AVG Semiconductors Quad 1 of 2 Data Selector/Multiplexer Plastic Dip Through Hole Scan PDF
    DV74ALS161BN AVG Semiconductors 4 Bit Sync. Binary Counter Async. Reset Plastic Dip Through Hole Scan PDF
    DV74ALS163BN AVG Semiconductors 4 Bit Sync. Binary Counter Sync. Reset Plastic Dip Through Hole Scan PDF
    DV74ALS174N AVG Semiconductors Hex D Type Flip Flop Plastic Dip Through Hole Scan PDF
    DV74ALS175N AVG Semiconductors Quad D Type Flip Flop Plastic Dip Through Hole Scan PDF
    DV74ALS191N AVG Semiconductors Synchronous Up/down Binary Counter Plastic Dip Through Hole Scan PDF
    DV74ALS193N AVG Semiconductors Synchronous Up/down Binary Counter W/clear Plastic Dip Through Hole Scan PDF

    DV74ALS1 Datasheets Context Search

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    ls123

    Abstract: No abstract text available
    Text: AVG Semiconductors_DDi Technical Data 123 DV74LS123 DV74ALS123 Dual Monostable Multivibrators with Clear These DC triggered multivibrators feature pulse width control by three methods. The basic pulse width is programmed by selection


    OCR Scan     		PDF DV74LS123 DV74ALS123 AVG-003 AVG-004 1-800-AVG-SEMI DV74LS123, ALS123 ls123

    Untitled

    Abstract: No abstract text available
    Text: AVG DDi Semiconductors Technical Data DV74LS190 DV74ALS190 DV74LS191 DV74ALS191 Synchronous Up/Down Decade and Binary Counters The 74LS/ALS 190 is a synchronous UP/DOWN BCD Decade counter 8421 The 74LS/ALS 191 is a synchronous UP/DOWN Modulo-16 Binary Counter. State changes of the counters are


    OCR Scan     		PDF DV74LS190 DV74ALS190 DV74LS191 DV74ALS191 74LS/ALS Modulo-16 ALS190 LS190

    Untitled

    Abstract: No abstract text available
    Text: 1011A AVG DDiT Semiconductors Technical Data DV74ALS1011A Triple 3-Input AND Buffers This device contains three independent buffers, each of which per­ forms the logic AND function. • AVG's ALS has guaranteed DC and AC specification over full temperature and Vcc range


    OCR Scan     		PDF DV74ALS1011A AVG-001 1-800-AVG-SEMI 00G027D

    Untitled

    Abstract: No abstract text available
    Text: AVG Semiconductors DDi 1002 Technical Data DV74ALS1002A Quad 2-Input Positive-NOR Buffer N Suffix Plastic DIP AVG-001 Case This device contains four independent 2-input buffers, each of which performs the logic NOR function. • AVG’s ALS has guaranteed DC and AC specification over


    OCR Scan     		PDF DV74ALS1002A AVG-001 AVG-002 ALS1002A 1-800-AVG-SEMt

    Untitled

    Abstract: No abstract text available
    Text: 1008 AVG DDiT Semiconductors Technical Data DV74ALS1008A Quad 2-Input AND Buffers This device contains four independent 2-input buffers, each of which performs the logic AND function. • AVG’s ALS has guaranteed DC and AC specification over full temperature and Vcc range


    OCR Scan     		PDF DV74ALS1008A AVG-001 AVG-002 ALS1008A 1-800-AVG-SEMI DV74ALS1008

    Untitled

    Abstract: No abstract text available
    Text: AVG Semiconductors DDiT Technical Data DV74LS10 DV74ALS10A Triple 3-Input NAND Gates N Suffix Plastic DIP AVG-001 Case This device contains three independent gates, each of which performs the logic NAND function. AVG’s LS operates over extended Vcc from 4.5 to 5.5 V


    OCR Scan     		PDF DV74LS10 DV74ALS10A AVG-001 AVG-002 ALS10A DV74LS10, 1-800-AVG-SEMI

    LS109A

    Abstract: No abstract text available
    Text: AVG Semiconductors DDi Technical Data 109 A Dual JK Positive Edge-Triggered Flip-Flops DV74LS109A DV74ALS109A This device is_a dual edge-triggered flip-flop. Each flip-flop has individual J, K, clock, reset and preset inputs, and also com­ plementary Q and Q outputs.


    OCR Scan     		PDF DV74LS109A DV74ALS109A DV74LS109A, 1-800-AVG-SEMI LS109A LS109A

    Untitled

    Abstract: No abstract text available
    Text: 1035 AVG Semiconductors DDiT Technical Data DV74ALS1035 Hex Non-Inverting Drivers with Open Collector Outputs N Suffix Plastic DIP AVG-001 Case This device contains six independent drivers, each of which performs the logic identity function. The Outputs require


    OCR Scan     		PDF DV74ALS1035 AVG-001 AVG-002 ALS1035 1-800-AVG-SEMI 0D00E7B

    als1005

    Abstract: DV74ALS1005 ALS100-5
    Text: 1005 AVG Semiconductors DDiT Technical Data Hex Inverting Drivers with Open Collector Outputs DV74ALS1005 This device contains six independent drivers, each of which performs the logic INVERT/Complement function. The Outputs require external pull-up resistors


    OCR Scan     		PDF DV74ALS1005 AVG-001 AVG-002 Le1005 ALS1005 als1005 DV74ALS1005 ALS100-5

    LS11

    Abstract: No abstract text available
    Text: AVG DDT Sem iconductors Technical Data DV74LS11 DV74ALS11A Triple 3-Input AND Gate This device contains three independent gates, each of which performs the logic AND function. • • • • N Suffix Plastic DIP AVG-001 Case AVG’s LS operates over extended Vcc from 4.5 to 5.5 V


    OCR Scan     		PDF DV74LS11 DV74ALS11A AVG-001 AVG-002 ALS11A DV74LS11, 1-800-AVG-SEMI LS11

    Untitled

    Abstract: No abstract text available
    Text: DDi" DV74LS145 DV74ALS145 Available Q 2 ,1995 1 of 10 Decoder/Driver with Open Collector Outputs N Suffix Plastic DIP AVG-001 Case This 1 of 10 decoder driver is designed to accept BCD inputs and to provide appropriate outputs to drive incandescent displays. Outputs remain off for invalid input conditions. It is


    OCR Scan     		PDF DV74LS145 DV74ALS145 AVG-001 AVG-002 LS145 DV74LS145, ALS145 1-800-AVG-SEMI

    Untitled

    Abstract: No abstract text available
    Text: 1010 AVG Semiconductors DDiT Technical Data DV74ALS1010A Triple 3-Input NAND Buffers This device contains three independent buffers, each of which per­ forms the logic NAND function. • • • • • N Suffix Plastic DIP AVG-001 Case AVG’s ALS has guaranteed DC and AC specification over full


    OCR Scan     		PDF DV74ALS1010A AVG-001 1-800-AVG-SEMI

    Untitled

    Abstract: No abstract text available
    Text: AVG Semiconductors DDi Technical Data 175 DV74LS175 DV74ALS175 Quad D Flip-Flop with Master Reset This device is useful for general flip-flop requirements featuring common clock and clear inputs, and both complementary and true outputs. The information on the D inputs is stored during


    OCR Scan     		PDF DV74LS175 DV74ALS175 AVG-003Case LS175 ALS175 DV74LS175, 1-800-AVG-SEMI

    Untitled

    Abstract: No abstract text available
    Text: AVG Semiconductors DDiT Technical Data DV74LS125 A DV74ALS125 Quad Bus Buffer Gate 3 State ro cn N Suffix Plastic DIP A V G -001 Case This Quad 3-State Buffer contains four independent gates, each of which performs a non-inverting buffer function. Buffer


    OCR Scan     		PDF DV74LS125 DV74ALS125 DV74LS125A, 1-800-AVG-SEMI TG1011Ã 1-800-AVG-SEMI DV74ALS125

    Untitled

    Abstract: No abstract text available
    Text: 1000 AVG Semiconductors DDiT Technical Data DV74ALS1000A Quad 2-Input NAND Buffer This device contains four independent 2-input buffers, each of which performs the logic NAND function. N Suffix Plastic DIP AVG-001 Case AVG’s ALS has guaranteed DC and AC specification


    OCR Scan     		PDF DV74ALS1000A AVG-001 1-800-AVG-SEMI

    Untitled

    Abstract: No abstract text available
    Text: DDi AVG Semiconductors Technical Data Dual JK Negative Edge-Triggered Flip-Flops with SET, common CLEAR and common CLOCK DV74LS114A DV74ALS114A N Suffix Plastic DIP AVG-001 Case The circuity in this device contains common clock and common clear inputs. When the clock goes HIGH, the inputs are enabled


    OCR Scan     		PDF DV74LS114A DV74ALS114A AVG-001 AVG-002 1-800-AVG-SEMI DV74LS114A, LS114A

    Untitled

    Abstract: No abstract text available
    Text: 1034 AVG Semiconductors DDiT Technical Data DV74ALS1034 Hex Driver This device contains six independent drivers, each of which performs the logic identity function. • AVG’s ALS has guaranteed DC and AC specification over full temperature and Vcc range


    OCR Scan     		PDF DV74ALS1034 1-800-AVG-SEMI

    Untitled

    Abstract: No abstract text available
    Text: 164 AVG Semiconductors DDiT Technical Data DV74LS164 DV74ALS164 8-Bit Serial-ln Parallel-Out Shift Register N Suffix Plastic D IP A V G -001 C ase This device is a high speed 8-Bit Serial-ln-Parallel-Out Shift Register. Serial data is entered through a 2-Input AND gate synchronous with the


    OCR Scan     		PDF DV74LS164 DV74ALS164 ALS164 LS164 1-800-AVG-SEMI 00D015Ã DV74LS164, ALS164A

    Untitled

    Abstract: No abstract text available
    Text: AVG Semiconductors DDi Technical Data DV74LS12 DV74ALS12A Triple 3-Input NAND Gate with Open Collector Outputs This device contains three independent 3-input gates with open-collector outputs. These perform the logic NAND function in positive logic. The open-collector outputs require pull-up


    OCR Scan     		PDF DV74LS12 DV74ALS12A AVG-001 AVG-002 ALS12A DV74LS12, 1-800-AVG-SEMI

    Untitled

    Abstract: No abstract text available
    Text: AVG Semiconductors DDi Technical Data 113 Dual JK Negative Edge-Triggered Flip-Flops with PRESET DV74LS113A DV74ALS113A N Suffix Plastic DIP AVG-001 Case This device contains individual J, K, set, and clock inputs. When the clock goes HIGH, the inputs are enabled and data


    OCR Scan     		PDF DV74LS113A DV74ALS113A AVG-001 AVG-002 DV74LS113A, 1-800-AVG-SEMI LS113A

    Untitled

    Abstract: No abstract text available
    Text: AVG Semiconductors DDi Technical Data DV74ALS1004 Hex Inverting Driver This device contains six independent drivers, each of which performs the logic inverter/complement function. N Suffix Plastic DIP A V G -001 C ase • AVG’s ALS has guaranteed DC and AC specification over full


    OCR Scan     		PDF DV74ALS1004 ALS1004 1-800-AVG-SEMI

    ALS136

    Abstract: ls136
    Text: 136 AVG Sem iconductors DDT Technical Data DV74LS136 DV74ALS136 Quad 2-Input Exclusive OR Gate with Open Collector Outputs N Suffix Plastic DIP AVG-001 Case This device contains four independent gates, each of which performs the exclusive OR function. D Suffix


    OCR Scan     		PDF DV74LS136 DV74ALS136 AVG-001 LS136 ALS136 1-800-AVG-SEMI DV74LS136, DV74ALS136

    LS112A

    Abstract: ALS112A
    Text: DOT A VG Semiconductors 112 Technical Data Dual JK Negative Edge-Triggered Flip-Flops DV74LS112A DV74ALS112A N Suffix Plastic DIP AVG -003 Case This device contains two individual J. K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock pulse goes


    OCR Scan     		PDF DV74LS112A DV74ALS112A AVG-003 AVG-004 1-800-AVG-SEMI DV74LS112A, LS112A ALS112A LS112A ALS112A

    LS175

    Abstract: ALS175
    Text: AVG Semiconductors DDT Technical Data 175 DV74LS175 DV74ALS175 Quad D Flip-Flop with Master Reset This device is useful for general flip-flop requirements featuring common clock and clear inputs, and both complementary and true outputs. The information on the D inputs is stored during


    OCR Scan     		PDF DV74LS175 DV74ALS175 AVG-003C LS175 ALS175 DV74LS175, 1-800-AVG-SEMI LS175 ALS175