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    Text: 165 AVG Semiconductors DDiT Technical Data DV74LS165 DV74ALS165 8-Bit Parallel Load Shift Register This device is an 8-Bit parallel load or serial-in register with complemen­ tary outputs available from the last stage. Parallel inputing occurs asynchronously from the P0-P7 inputs when Load input is LOW. With


    OCR Scan     		DV74LS165 DV74ALS165 AVG-003 AVG-004 and-111 DV74LS165, LS165 ALS165 PDF