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Abstract: No abstract text available
Text: Alignment tool for cable markers - PABE-AZ - 1013193 Please be informed that the data shown in this PDF Document is generated from our Online Catalog. Please find the complete data in the user's documentation. Our General Terms of Use for Downloads are valid
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com/us/products/1013193
EC000761
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Text: Insert label - PABA WH - 1013151 Please be informed that the data shown in this PDF Document is generated from our Online Catalog. Please find the complete data in the user's documentation. Our General Terms of Use for Downloads are valid
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com/us/produkte/1013151
CL-2005)
EC000761
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Untitled
Abstract: No abstract text available
Text: Sensor/Actuator cable - SAC-3P-M5MS/1,0-PUR/M5FS - 1402496 Please be informed that the data shown in this PDF Document is generated from our Online Catalog. Please find the complete data in the user's
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com/us/products/1402496
EC001855
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Abstract: No abstract text available
Text: Sensor/Actuator cable - SAC-3P- 5,0-500/A - 1438804 Please be informed that the data shown in this PDF Document is generated from our Online Catalog. Please find the complete data in the user's documentation. Our General Terms of Use for Downloads are valid
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com/us/products/1438804
0-500/AÂ
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Untitled
Abstract: No abstract text available
Text: Sensor/Actuator cable - SAC-3P-5,0-PUR/A-1L-Z 110V - 1400627 Please be informed that the data shown in this PDF Document is generated from our Online Catalog. Please find the complete data in the user's
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com/us/products/1400627
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Untitled
Abstract: No abstract text available
Text: Sensor/Actuator cable - SAC-5P- 5,0-PVC/AD-2L - 1438639 Please be informed that the data shown in this PDF Document is generated from our Online Catalog. Please find the complete data in the user's documentation. Our General Terms of Use for Downloads are valid
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com/us/products/1438639
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ECL 10131
Abstract: 10131D 10131DC 10131N C30C62
Text: Philips Components 10131 Document No. 853-0660 ECN No. 99799 Date of Issue June 14, 1990 Status Product Specification Flip-Flop Dual D-iype Master-Slave Flip-Flop ECL Products FEATURES • Typical propagation delay: 3.0ns • Typical supply currant -lEE : 45mA
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ECL 10131
Abstract: signetics 10131 10131dc 10131N 10131F 25CC C30C62
Text: S ignetics 10131 Flip-Flop Dual D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 10131 is a Dual Master-Slave Flip Flop. Each flip-flop can be clocked sepa rately by holding the common Clock in the LOW state and using the Clock
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10131N
10131F
1110mV
ECL 10131
signetics 10131
10131dc
10131N
10131F
25CC
C30C62
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10h131
Abstract: SP9131DG SP9131 mc10131 pin compatible with PLESSEY
Text: d Ë J 7250513 D00b7Sl H | ~ PLESSEY SEMICONDUCTORS TS 7220513 PLESSEY SEMICONDUCTORS 95D 0 6 7 5 1 D T -9 1 -0 7 -Û S PLESSEY ADVANCE INFORMATION Semiconductors. SP9131 520MHz ECL DUAL D FLIP-FLOP The SP9131 Dual D type flip-flop Is pin compatible with 10131, but has improved dynamic performance.
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D00b7Sl
SP9131
520MHz
SP9131
MC10131
10H131
72E0S13
SP9131DG
pin compatible with PLESSEY
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t25 dc he nv
Abstract: No abstract text available
Text: ECL PRODUCT INFORMATION Test Voltage Values V v ih a MIN Vil a MAX -30 °C +25°C +85°C -0.890 -0.810 -0.700 -1.890 -1.850 -1.825 -1.205 -1.105 -1.035 -1.500 -1.475 -1.440 PARAMETER LOW LEVEL OUTPUT VOLTAGE LOW LEVEL VOH (V) HIGH LEVEL V0 LA <V> THRE8HOLD
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mc10131
Abstract: MC10H131
Text: i ECL 10KH High-Speed Em itter-Coupled Logic Fam ily MC10H131 Dual M aster-Slave Type D Flip-Flop Features/Benefits PRELIM IN ARY INFORMATION This docum ent contains spe cifications and inform ation which are subject to change. Ordering Information • Propagation delay, 1 ns typical
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MC10H131
10K-compatlble
MC10H131
MC10M131
C10131
C10H131
mc10131
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signetics 10107
Abstract: decoder active high outputs signetics 10131 ECL 10131 ECL 10102 ECL 10105
Text: LANSDALE SEMICONDUCTOR bOE J> I 5 3 ^ 3 0 3 O O O Q S m 0^3 « L T E Rating Supply Voltage - Vcc Input Voltage - Vjn SIGNETICS INTEGRATED CIRCUITS Output Source Current 10K ECL Storage Temperature Range Emitter-coupled logic is the fastest logic technology available
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14-LEAD
16-LEAD
10-LEAD
24-LEAD
signetics 10107
decoder active high outputs
signetics 10131
ECL 10131
ECL 10102
ECL 10105
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95H28 Fairchild
Abstract: dual d flip-flop 95H28
Text: FAIRCHILD DIGITAL ECL SSI FUNCTIONS Item Cont'd Function Power Dissipation mW (Typ) Logic/ Connection Diagram Package(s) DEVICE NO.* *pd ns (Typ) 10101/10501 2.0 100 E74 4L,6B,9B 230 E90 4Q,6Q OR/NOR Gates (Cont’d) 1 Quad OR/NOR 2 Q uint OR/NOR 100102
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11C06
95H28
106XX
95H28 Fairchild
dual d flip-flop
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95H28
Abstract: ECL D flip flop d flip-flop e89 330 11C06 oa9505 10576 330 e88 95H28 Fairchild
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DJGITAL-ECL E8S 10117/10517 E84 10113/10513 E86 10118/10518 & 8 4. P M -(9)5 — ^ -3 * (7) •2 (8 ) (11)7 ■.an (14)10 (15)11 (16)12(1)13- E87 10119/10519 V c c i = Pin 1 (5 ) V cc 2 = Pin 16 (4) Vee = Pin 8 (1 2)
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11C06
95H28
105XX
106XX
ECL D flip flop
d flip-flop
e89 330
oa9505
10576
330 e88
95H28 Fairchild
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11C70
Abstract: quad latch 95H29 10631 flip-flop
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-ECL E28 9534 E29 95029 E30 95130/10130/10530 5 9 13 11 15 16 B 10 So J Q CP 1211- 10- Vcc = Pin 4 Vcca = Pin 5 Vee = Pin 12 K c0 Q 0— 3 Vcci = Pin } Vcc2 = Pin 16 Vee = Pin 8 Vcci = Pin 1 (5) Vcc2 = Pin 16 (4)
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I05XX
106XX
11C70
quad latch
95H29
10631 flip-flop
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95H28
Abstract: 9582 Fairchild 95H28 Fairchild 9582 10631 flip-flop oa 9505 ecl 9528 11C06 11C58 95H29
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-ECL E21 11C58 E22 9582 E23 95115/10115/10515 9 5 (8)4 cx 1 1 - .¡¿ .1 4 2 Q Vex INPUT FILTER — (14) 10 ( 13)9 7 (11) 6 (10) (16) 12 ( 1) 13 15 (3) 14 (2) 14 BIAS FILTER 12 13 13 3 (7) 2 (6) U 0 -6 11 (15)
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11C58
9528/95H28
95H29
11C06
95H28
105XX
106XX
9582 Fairchild
95H28 Fairchild
9582
10631 flip-flop
oa 9505
ecl 9528
11C58
95H29
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA T rip le 2:1 M u ltip le x e r M C 1 0 0L V E L 59 M C100EL59 The MC100LVEL59 is a triple 2:1 multiplexer with differential outputs. The MC100EL59 is pin and functionally equivalent to the MC100LVEL59 but is specified for operation at the standard 100E ECL voltage supply.
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C100EL59
MC100LVEL59
MC100EL59
MC100LVEL59
20-Lead
500ps
MC100EL59
DL140
b3b72J55
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95H28
Abstract: 11C06 11C70 10576 95H28 Fairchild
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-ECL 10X11 6 7 (10) • <0) (S> 5 4 (7) 3 E40 10176/10576 E39 10175/10575 E38 10173/10573 <14)(16) (1) (13) (9) 10 12 13 9 5 (9) (10) (11) (14) (15) (16) 5 6 7 10 11 12 (1) (16) (15) (14) 13 12 11 10 I I I 1 I I I I I
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10X11)
11C06
95H28
105XX
106XX
11C70
10576
95H28 Fairchild
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330 e74
Abstract: 95H28 330 e77 11C06 e79 330
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-ECL E72 95003 E74 95101/10101/10501 E73 95004 E75 95102/10102/10502 8 4 2(6) (9)5 ( 10)6 (11)7 3(7) i > (14)10 (15)11 3 > - (16)12 9(13) (1)13 15(3) V c c i = Pin 1 V c c i = Pin 1 V c c i = Pin 1 (5 ) VCC 2 = Pin 16
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11C06
95H28
105XX
106XX
330 e74
330 e77
e79 330
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95H28
Abstract: 95H28 Fairchild 95002 11C06 95H00 q302-q1 oa 9505 10576 4 jd 5 e43
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-ECL E64 95000/10000 E63 95H00 9 11 13 14 i CPPE Po Pi P2 9 5 15 P3 Qo Q i 02 16 7 6 3 03 2 (1)13 (10)6 (15)11 (13)9 (15)11 ^ (11)7 j(14) 10j ( 1) ," 3 D | (8) dsm r E65 10141/10541 ( 10)6 - PE CP Po P1 P2 P3
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95H00
9502/95H02/
95H22/95L22
9503/95H03/
95H23/95L23
9504/95H04/
95H24/95L24
11C06
95H28
105XX
95H28 Fairchild
95002
95H00
q302-q1
oa 9505
10576
4 jd 5 e43
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SP9131
Abstract: 10h131 SP9131DG ECL 10131 52 ra SP9131AC
Text: GEC P L E S S E Y fs~E M ñ c o N d Tj C T O R S I 1991-1.0 SP9131 520MHz ECL DUAL D FLIP-FLOP T h e SP9131 D ual D ty p e flip -flo p is p in c o m p a tib le w ith 10131, b u t has im p ro ve d d y n a m ic p erfo rm a n ce . Vcci [ i FEATURES 01 [ 2 •
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SP9131
520MHz
SP9131
MC10131
10h131
SP9131DG
ECL 10131
52 ra
SP9131AC
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95H28
Abstract: ECL D flip flop D Flipflop 95H28 Fairchild GI 9528 11C06 ecl 9528 10576 10631 flip-flop
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-ECL E28 9534 E29 95029 E30 95130/10130/10530 5 9 13 11 15 16 B 10 So J Q CP 1211- 10- K c0 Q 0— 3 V c c i = Pin } V cc 2 = Pin 16 Vee = Pin 8 Vcc = Pin 4 V cca = Pin 5 V ee = Pin 12 V cci = Pin 1 (5 ) Vcc 2 = Pin 16 (4)
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11C06
95H28
105XX
106XX
ECL D flip flop
D Flipflop
95H28 Fairchild
GI 9528
ecl 9528
10576
10631 flip-flop
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95h28
Abstract: e74 330 330 e74 ecl 9528 d flipflop dual d flip-flop oa 9505 D Flipflop 95h28 oa9505 11C06
Text: FA IR C H ILD D IG ITA L ECL SSI F U N C TIO N S Item Cont'd Function D EV IC E N O .* tpd ns (Typ) Power Dissipation mW (Typ) Logic/ Connection Diagram Package(s) O R /N O R Gates (C o n t’d) 1 Q uad O R /N O R 10101/10501 2.0 100 E74 4L,6B,9B 2 Q u in t O R /N O R
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11C06
95H28
I05XX
106XX
e74 330
330 e74
ecl 9528
d flipflop
dual d flip-flop
oa 9505
D Flipflop 95h28
oa9505
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CPIE
Abstract: F10131 F10531 fairchild ECL
Text: F 10131^ F 10531 ^ HIGH SPEED DUAL D FLIP-FLOP DESCRIPTION - The F10131/F10531 contains two master/slave D-type flip-flops. The internal clock is the OR of two clock inputs, one common to both flip-flops. The OR clock permits the use of one input as a clock pulse and the other as an active LOW enable. While the
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F10531^
F10131/F10531
F10131
F10531
CPIE
F10131
F10531
fairchild ECL
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