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    EEPROM LOGIC 1997 Search Results

    EEPROM LOGIC 1997 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    DCL541A01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: Low / Input disable Visit Toshiba Electronic Devices & Storage Corporation
    DCL542H01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=2:2) / Default Output Logic: High / Output enable Visit Toshiba Electronic Devices & Storage Corporation
    DCL541B01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: High / Input disable Visit Toshiba Electronic Devices & Storage Corporation

    EEPROM LOGIC 1997 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Siemens SLE

    Abstract: Mifare mikron 44C42 Mifare reader protocol mikron 4K Mifare CMS Semiconductor
    Text: ICs for Chip Cards SLE 44R42S "Combi Card-IC" 8-bit Security Controller with 17-Kbyte ROM, 256-byte RAM, 4-Kbyte EEPROM and Sleep Mode combined with MIFARE -Circuit for Contactless Transmission with Security Logic and Anti-Collision and 4-Kbyte Common-EEPROM


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    44R42S 17-Kbyte 256-byte Siemens SLE Mifare mikron 44C42 Mifare reader protocol mikron 4K Mifare CMS Semiconductor PDF

    10-SPEED

    Abstract: RQFP EPM9400A
    Text: MAX 9000A Programmable Logic Device Family April 1997, ver. 1 Features Advance Information Brief • ■ Advanced Information ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX


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    PDF

    PQFP 256

    Abstract: 256-pin BGA
    Text: Michelangelo Programmable Logic Device Family May 1997, ver. 2 Features Advance Information Brief • ■ Advance Information ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on fourth-generation Multiple Array MatriX


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    7000S PQFP 256 256-pin BGA PDF

    337 BGA footprint

    Abstract: 153G8 three d flipflop chip EPM7032B EPM7064B EPM7128B EPM7256B EPM7256E EPM7512B JESD-71
    Text: MAX 7000B Programmable Logic Device Family October 2000, ver. 2.1 Data Sheet • Features. Preliminary Information ■ f High-performance 2.5-V CMOS EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX (MAX®) architecture (see Table 1)


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    7000B 7000S 49-pin 169-pin 337 BGA footprint 153G8 three d flipflop chip EPM7032B EPM7064B EPM7128B EPM7256B EPM7256E EPM7512B JESD-71 PDF

    C732B

    Abstract: 337 BGA 337 BGA footprint EPM7032AE EPM7064AE EPM7128A EPM7128AE EPM7256A EPM7256AE EPM7512AE
    Text: MAX 7000A Includes MAX 7000AE Programmable Logic Device Family August 2000, ver. 3.1 Data Sheet • Features. ■ ■ ■ ■ ■ ■ ■ f High-performance 3.3-V EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX


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    7000AE JESD-71 EPM7128A EPM7256A 49-pin 169-pin C732B 337 BGA 337 BGA footprint EPM7032AE EPM7064AE EPM7128AE EPM7256AE EPM7512AE PDF

    eeprom programmer schematic

    Abstract: No abstract text available
    Text: MAX 7000A Includes MAX 7000AE Programmable Logic Device Family June 1999, ver. 2.01 Data Sheet Features. • ■ Preliminary Information ■ ■ ■ ■ ■ f High-performance CMOS EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX


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    7000AE EPM7128A EPM7256A EPM7128AE EPM7256AE EPM7512AE eeprom programmer schematic PDF

    EPM7218

    Abstract: No abstract text available
    Text: MAX 7000A Includes MAX 7000AE Programmable Logic Device Family July 1999, ver. 2.02 Data Sheet Features. • ■ Preliminary Information ■ ■ ■ ■ ■ f High-performance CMOS EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX


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    7000AE EPM7128A EPM7256A 256-pin EPM7218 PDF

    TTL pin outs

    Abstract: 30J341 CMOS TTL Logic Family Specifications BGA and QFP Package BITBLASTER footprint tqfp 208 v16 248 337 BGA footprint N12110 74 series pin outs
    Text: MAX 7000A Includes MAX 7000AE Programmable Logic Device Family September 1999, ver. 2.03 Data Sheet Features. • ■ Preliminary Information ■ ■ ■ ■ ■ f High-performance CMOS EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX


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    7000AE EPM7128A EPM7256A 256-pin TTL pin outs 30J341 CMOS TTL Logic Family Specifications BGA and QFP Package BITBLASTER footprint tqfp 208 v16 248 337 BGA footprint N12110 74 series pin outs PDF

    epm7032

    Abstract: EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E K2107
    Text: Includes MAX 7000E & MAX 7000S MAX 7000 Programmable Logic Device Family July 1999, ver. 6.01 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array MatriX (MAX®)


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    7000E 7000S 7000S epm7032 EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E K2107 PDF

    EPM7192S

    Abstract: EPM7032 EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E epm7064 adapter MAX7000E
    Text: Includes MAX 7000E & MAX 7000S MAX 7000 Programmable Logic Device Family August 2000, ver. 6.02 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array MatriX (MAX®)


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    7000E 7000S 7000S in-to02: EPM7192S EPM7032 EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E epm7064 adapter MAX7000E PDF

    100-Pin Package Pin-Out Diagram

    Abstract: 7128s 84-Pin Package Pin-Out Diagram CLASSIC EPLD FAMILY u8318 EPM7064 100-Pin Package Pin-Out Diagram
    Text: Includes MAX 7000E & MAX 7000S MAX 7000 Programmable Logic Device Family June 1996, ver. 4 Data Sheet Features. • ■ ■ ■ ■ ■ ■ ■ ■ High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array MatriX (MAX)


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    7000E 7000S 7000S 100-Pin Package Pin-Out Diagram 7128s 84-Pin Package Pin-Out Diagram CLASSIC EPLD FAMILY u8318 EPM7064 100-Pin Package Pin-Out Diagram PDF

    EPM9560 pinout

    Abstract: No abstract text available
    Text: MAX 9000 Programmable Logic Device Family June 1996, ver. 4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX


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    12-ns EPM9560 pinout PDF

    D2433

    Abstract: EPM7032 EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E 100-Pin Package Pin-Out Diagram
    Text: Includes MAX 7000E & MAX 7000S MAX 7000 Programmable Logic Device Family July 1999, ver. 6.01 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array MatriX (MAX®)


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    7000E 7000S 7000S D2433 EPM7032 EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E 100-Pin Package Pin-Out Diagram PDF

    AF14

    Abstract: EPM9320 EPM9560
    Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family July 1999, ver. 6.01 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX


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    10-ns AF14 EPM9320 EPM9560 PDF

    44R35

    Abstract: MIFARE coil design INLAY MODULE ANTENNA CARDS
    Text: ICs for Chip Cards SLE 44R35/Mifare Intelligent 1-Kbyte EEPROM with Interface for Contactless Transmission, Security Logic and Anticollision according to the MIFARE®-System Preliminary Short Product Information 07.97, Version 2.0 6/ 50LIDUH 6KRUW 3URGXFW ,QIRUPDWLRQ


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    44R35/Mifare® 50LIDUH® chang232/ Q67100Z3028 44R35 MIFARE coil design INLAY MODULE ANTENNA CARDS PDF

    TUSB2140B

    Abstract: No abstract text available
    Text: TUSB2077A 7ĆPORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE SLLS414 − MARCH 2000 D Universal Serial Bus USB Version 1.1 D D D D Push-Pull Outputs for PWRON Eliminate Compliant Integrated USB Transceivers 3.3-V Low Power ASIC Logic


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    TUSB2077A SLLS414 48-MHz TUSB2140B PDF

    TUSB2140B

    Abstract: No abstract text available
    Text: TUSB2077A 7-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE SLLS414 – MARCH 2000 D D D D D Universal Serial Bus USB Version 1.1 Compliant Integrated USB Transceivers 3.3-V Low Power ASIC Logic Two Power Source Modes – D D


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    TUSB2077A SLLS414 TUSB2077APT TUSB2077A, TUSB2077APTR TUSB2140B PDF

    TUSB2140B

    Abstract: No abstract text available
    Text: TUSB2077A 7-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE SLLS414 – MARCH 2000 D D D D D Universal Serial Bus USB Version 1.1 Compliant Integrated USB Transceivers 3.3-V Low Power ASIC Logic Two Power Source Modes – D D


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    TUSB2077A SLLS414 TUSB2140B PDF

    TUSB2140B

    Abstract: m93c46 HC49U TPS2041 TPS2044 TUSB2046 TUSB2077A
    Text: TUSB2077A 7-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE SLLS414 – MARCH 2000 D D D D D Universal Serial Bus USB Version 1.1 Compliant Integrated USB Transceivers 3.3-V Low Power ASIC Logic Two Power Source Modes – D D


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    TUSB2077A SLLS414 TUSB2140B m93c46 HC49U TPS2041 TPS2044 TUSB2046 TUSB2077A PDF

    bd05

    Abstract: No abstract text available
    Text: ST1305 HIGH ENDURANCE CMOS 192 bit EEPROM WITH SECURE LOGIC ACCESS CONTROL BRIEF DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SINGLE 5V SUPPLY VOLTAGE PROGRAMMING TIME: 5 ms MEMORY DIVIDED INTO: – 16 bits of Chip Data – 48 bits of Application Data


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    ST1305 bd05 PDF

    NM25C04

    Abstract: NM93C86A serial eeprom logic 1997
    Text: Fairchild Application Note 860 Paul Bryant March 1997 TABLE OF CONTENTS 1.0 INTRODUCTION which may initiate a false write or erase cycle. This data corruption is a concern for the designer since the non-volatile nature of the EEPROM means that after data corruption has


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    Semicondu30 an011726 NM25C04 NM93C86A serial eeprom logic 1997 PDF

    93C46

    Abstract: AN-716 AN-871 LP2953 NM93C46 93C46 national AN-871 national
    Text: Fairchild Application Note 1008 Robert Stodieck March 1997 EEPROMs are useful because they are non-volatile memories that can be updated easily and quickly in a system without being physically removed. System designers working with early EEPROMs quickly learned that in addition to remembering data that they were asked to record, EEPROMs


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    an012503 93C46 AN-716 AN-871 LP2953 NM93C46 93C46 national AN-871 national PDF

    280-pin

    Abstract: No abstract text available
    Text: Includes MAX 9000A MAX 9000 Programmable Logic Device Family May 1999» ver. 6 Features Data Sheet ^ $ $8 M ffl M $8 j&j &£ 88 ^ High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX (MAX®) architecture


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    10-ns Inte67 280-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: SGS-THOMSON m ST1305 HIGH ENDURANCE CMOS 192 bit EEPROM WITH SECURE LOGIC ACCESS CONTROL BRIEF DATA SINGLE 5V SUPPLY VOLTAGE PROGRAMMING TIME: 5 ms MEMORY DIVIDED INTO: Figure 1 Delivery forms - 16 bits of Chip Data - 48 bits of Application Data - 48 bits of Count Data


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    ST1305 RST------ST1305 PDF