EPD-660-5
Abstract: an 6605 EPD-660-5 application
Text: Selective Photodiode Preliminary data EPD-660-5 Spectral range Type Technology Case Visible-red EPD-660-5 AlGaAs/AlGaAs/GaAs 5 mm plastic lens Description Applications Narrow response range 660 nm peak , single heterostructure on the substrate Optical communications,
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EPD-660-5
EPD-660-5
an 6605
EPD-660-5 application
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EPD-660-5
Abstract: EPD-660-5-0 str 062
Text: Photodiode EPD-660-5-0.9 27.04.2007 Preliminary rev. 02/06 Wavelength Type Technology Case Red water clear AlGaAs/GaAs 5 mm plastic lens Description Selective photodiode mounted in standard 5 mm package without standoff . Narrow response range 660 nm peak by means of integrated filter
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EPD-660-5-0
D-12555
EPD-660-5
str 062
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SSD1606
Abstract: No abstract text available
Text: SOLOMON SYSTECH SEMICONDUCTOR TECHNICAL DATA SSD1606 Advanced information 4GS Active Matrix EPD 128 x 180 Display Driver with Controller This document contains information on a new product. Specifications and information herein are subject to change without notice.
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SSD1606
SSD1606
11-May-11
17-Oct-11
2002/95/EC
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DSLAM configuration AWS
Abstract: rx bc nbk TSC 13003 pcr 465 ATML 18751 circuit BKC International mpc82 bsdl nd1 marking code acm 33221
Text: MC92520 ATM Cell Processor User’s Manual MC92520UM/D Rev. 0, 12/2000 DigitalDNA and Mfax are trademarks of Motorola, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola microprocessors. There are no express or implied copyright licenses granted hereunder to design or fabricate Motorola integrated circuits or integrated
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MC92520
MC92520UM/D
DSLAM configuration AWS
rx bc nbk
TSC 13003
pcr 465
ATML
18751 circuit
BKC International
mpc82 bsdl
nd1 marking code
acm 33221
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r72v17
Abstract: hs 7461 S1R72V17B00B S1R72V17B05Q 63936-1 S1R72 usb/usb/str 7656
Text: S1R72V17*Q Technical Manual Rev.1.5 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any
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S1R72V17*
acco1295-750-216/
r72v17
hs 7461
S1R72V17B00B
S1R72V17B05Q
63936-1
S1R72
usb/usb/str 7656
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processor cross reference
Abstract: DATASHEET OF DMA dma controller ADSP-21065 ADSP-21065L CHN 643 CHN 632 CHN 617 CHN 616 CHN 642
Text: '0$ Figure 6-0. Listing 6-0. Table 6-0. Table 6-0. Direct Memory Access DMA provides a mechanism for transferring an entire block of data. The processor’s on-chip DMA controller relieves the core processor of moving data between internal memory and an external data source or
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ADSP-21065L
ADSP-21065L
processor cross reference
DATASHEET OF DMA
dma controller
ADSP-21065
CHN 643
CHN 632
CHN 617
CHN 616
CHN 642
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Untitled
Abstract: No abstract text available
Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.
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CN8236
CN8236
500372B
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IHI Rotary Encoder
Abstract: RFT A1524 88AP166 A1015 gr 331 Marvell armada reference manual marvell armada 310
Text: Cover Marvell ARMADA 16x Applications Processor Family Software Manual Doc. No. MV-S301544-00 , Rev. October 2010 Marvell. Moving Forward Faster PUBLIC RELEASE Marvell® ARMADA 16x Applications Processor Family Software Manual Document Conventions Note: Provides related information or information of special importance.
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MV-S301544-00
MV-S301544-00
IHI Rotary Encoder
RFT A1524
88AP166
A1015 gr 331
Marvell armada reference manual
marvell armada 310
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WG12864A
Abstract: 7028 SMD Transistor wh1604 WH1602B 94V0 200108 TRANSISTOR SMD MARKING CODE NM cree 3535 WH1602L WG24064A Kingbright 55-0197
Text: Optoelectronics New products SMD LEDs White 3528 Series High Power SMD LEDs White 3535 37E Series From £0.05 See page 604 Page 599 From £0.64 12V LED Strips, 4.8W per metre 12V LED Strips, 4.8W per metre Warm white See page 610 Cool white See page 610 From
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L-934
1511A35W3
1511A35W3D
1511A35UY3
1511A35UG3
1000mcd
500mcd
200mcd
1500mcd
5mA/10mA
WG12864A
7028 SMD Transistor
wh1604
WH1602B
94V0 200108
TRANSISTOR SMD MARKING CODE NM
cree 3535
WH1602L
WG24064A
Kingbright 55-0197
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pin diagram for core i7 processor
Abstract: addressing mode in core i7 sec memory 32 pin pm47-32 dsp 32 c processor eb3wm 40 pin EPD controller 00FF ADSP-21065L px270
Text: 0 025< Figure 5-0. Table 5-0. Listing 5-0. The processor’s dual-ported SRAM provides 544 Kbits of on-chip storage for program instructions and data. The processor’s internal bus architecture provides a total memory bandwidth of 900 Mbytes/sec., enabling the core to access 660 Mbytes/sec. and
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48-bit
32-bit
ADSP-21065L
pin diagram for core i7 processor
addressing mode in core i7
sec memory 32 pin
pm47-32
dsp 32 c processor
eb3wm 40 pin
EPD controller
00FF
px270
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MOST25
Abstract: MOST50 ADSP-21469 ADSP-2146x ADSP-21160 transistor Bc 82
Text: SHARC Processor ADSP-21467/ADSP-21469 Preliminary Technical Data SUMMARY Code compatible with all other members of the SHARC family The ADSP-2146x processors are available with unique audiocentric peripherals such as the digital applications interface, DTCP digital transmission content protection
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ADSP-21467/ADSP-21469
ADSP-2146x
32-bit/40-bit
324-Ball
BC-324-1
PR07900-0-4/10
MOST25
MOST50
ADSP-21469
ADSP-21160
transistor Bc 82
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MOST25
Abstract: ADSP-21469BBCZ-3 t04 68 3 pin diode ADSP-21469 t04 68 3 pin transistor MOST50 connector ADSP-214xx MOST50 ADSP-21469KBCZ-3 t03 package transistor pin configuration
Text: SHARC Processor ADSP-21469 SUMMARY The ADSP-21469 processor is available with unique audiocentric peripherals such as the digital applications interface, DTCP digital transmission content protection protocol , serial ports, precision clock generators, S/PDIF
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ADSP-21469
ADSP-21469
32-bit/40-bit
324-Ball
BC-324-1
ADSP-21469KBCZ-4
MOST25
ADSP-21469BBCZ-3
t04 68 3 pin diode
t04 68 3 pin transistor
MOST50 connector
ADSP-214xx
MOST50
ADSP-21469KBCZ-3
t03 package transistor pin configuration
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SME2411BGA-66
Abstract: W48C60 SME2411BGA w48c60-422 UPA64S J0801 PCI INC SME5421MCZ-333 SME5421MCZ-360 UltraSPARC-IIi
Text: 805-5004.frm Page 1 Friday, January 22, 1999 4:42 PM SME5421MCZ-333 SME5421MCZ-360 December 1998 UltraSPARC -IIi CPU Module DATA SHEET 333/360 MHz CPU, 2-MByte E-cache, UPA64S, 66 MHz PCI FUNCTIONAL DESCRIPTION The UltraSPARC™-IIi CPU Module [1] is a high performance, SPARC V9-compliant, small form-factor processor module. It interfaces to the UltraSPARC Port Architecture 64-bit Slave UPA64S interconnect bus, main
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SME5421MCZ-333
SME5421MCZ-360
UPA64S,
64-bit
UPA64S)
UPA64S
SME2411BGA-66
W48C60
SME2411BGA
w48c60-422
UPA64S
J0801
PCI INC
SME5421MCZ-333
SME5421MCZ-360
UltraSPARC-IIi
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sharc accelerator IIR
Abstract: sharc ADSP-214xx FFT Accelerator ADSP-21469
Text: SHARC Processor ADSP-21467/ADSP-21469 SUMMARY Available with unique audiocentric peripherals such as the digital applications interface, DTCP digital transmission content protection protocol , serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate
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ADSP-21467/ADSP-21469
32-bit/40-bit
Ord469KBCZ-4
324-Ball
BC-324-1
BC-324-1
D07900-0-12/11
sharc accelerator IIR
sharc ADSP-214xx FFT Accelerator
ADSP-21469
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LXV Series
Abstract: SPORT timing DIAGRAM OF ROM MRS 1031 4 bit by bit 4 multiplication IC db 3 xv 27 diagram for 4 bits binary multiplier circuit ADSP-21065L B-28 B-30
Text: , ,1' ; Numerics 32- and 48-bit memory words, using 5-30 32-bit data starting memory address 5-35 A AC (ALU fixed-point carry bit 2-16 described 2-18 fixed-point logic operations and 2-18 setting and clearing 2-18 AC condition 3-13 Access address fields for external memory
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48-bit
32-bit
16-bit
ADSP-21065L
LXV Series
SPORT
timing DIAGRAM OF ROM
MRS 1031
4 bit by bit 4 multiplication IC
db 3 xv 27
diagram for 4 bits binary multiplier circuit
B-28
B-30
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GE Manual
Abstract: Transistor BFT 98 oscilloscope service manual mos 620 ADSP-21065L B-28 B-30 B-31
Text: , ,1' ; Numerics 32- and 48-bit memory words, using 5-30 32-bit data starting memory address 5-35 A AC (ALU fixed-point carry bit 2-16 described 2-18 fixed-point logic operations and 2-18 setting and clearing 2-18 AC condition 3-13 Access address fields for external memory
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48-bit
32-bit
16-bit
ADSP-21065L
GE Manual
Transistor BFT 98
oscilloscope service manual mos 620
B-28
B-30
B-31
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rx1a 1244
Abstract: CHN 616 ice 8040 ADSP-21065L h 945 p 4000 CMOS texas instruments 0x200014 F15-F8 PM48 multi timer Chn 835
Text: ADSP-21065L SHARC DSP User’s Manual Revision 2.0, July 2003 Part Number 82-001833-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent
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ADSP-21065L
I-127
I-128
16-bit
rx1a 1244
CHN 616
ice 8040
h 945 p
4000 CMOS texas instruments
0x200014
F15-F8
PM48 multi timer
Chn 835
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0285E
Abstract: No abstract text available
Text: n v i TW = X ^ UXLtY DUAL POLARITY EZELED ELED/1750/DMC/-RANGE FEATURES • replaces unreliable filament bulbs • 6 colours • dual polarity d.c. or a.c. operation • 12 or 28 V supplies • 6 - chip for high brightness • high thermal conductivity potting
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ELED/1750/DMC/-RANGE
/1750/D
Blue28
MIL-Q-9858,
MIL-1-45208
0285E
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VPA05
Abstract: No abstract text available
Text: SSI 32D5392 ¿mmsusfons Data Sync/1,7 RLL ENDEC with Write Precomp, and Window Shift A TDK Group/Company September 1993 DESCRIPTION FEATURES The SSI 32D5392 Data Synchronizer/1,7 RLL ENDEC provides data recovery and data encoding for storage systems which employ a 1, 7 RLL encoding format.
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32D5392
32D5392
w392-CH
32D5392-CM
32D5392-CH
VPA05
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32D5393-CH
Abstract: 32D5393 32D5393-cg SSI32D5393
Text: ¿¡iimsitskms SSI 32D5393 Data Sync/1, 7 RLL ENDEC with Write Precomp, and Window Shift A TDK G ro u p/C o m p an y October 1992 DESCRIPTION FEATURES Data syn ch ro n ize r and 1 ,7 RLL ENDEC The SSI 32D5393 Data Synchronizer/1,7 RLL ENDEC provides data recovery and data encoding for storage
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32D5393
32D5393
32D5393-CG
32D5393-CH
092-rev.
SSI32D5393
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32d5391
Abstract: rll to nrz
Text: JUL cMMSyshtis* 1 6 1993, SSI 32D5391 Data Sync/1,7 RLL ENDEC with Write Precomp, and Window Shift A TDK Group/Com pany June 1993 DESCRIPTION The SSI 32D5391 Data Synchronizer/1,7 RLL ENDEC provides data recovery and data encoding for storage systems which employ a 1, 7 RLL encoding format.
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32D5391
32D5391
32D5391-CH
rll to nrz
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VPA05
Abstract: 32d5396 ssi32d5396
Text: SSI 32D5396/5396A Data Sync/1, 7 RLL ENDEC with Write Precomp, and Window Shift M a m M k n is A TDK Group/Company Advance Information October 1993 DESCRIPTION FEATURES The SSI 32D5396/96A Data Synchronizer/1, 7 RLL ENDEC provides data recovery and data encoding for
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32D5396/5396A
32D5396/96A
VPA05
32d5396
ssi32d5396
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48c60
Abstract: CZ-333
Text: SME5421MCZ-333 June 1998 m icrosystem s UltraSPARC-ll/ CPU Module DATA SHEET 333 MHz CPU, 2MB E-cache, UPA, 66 MHz PCI F u n c t io n a l D e s c r ip t io n [1] The UltraSPARC-IIi CPU M odule is a high perform ance, SPARC V9-com pliant, small form -factor processor
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SME5421MCZ-333
UPA64S)
UPA64S
48c60
CZ-333
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SME2411BGA-66
Abstract: W48C60
Text: microsystems November 1998 UltraSPARC -!!/ CPU Module DATA SHEET 333/360 M Hz CPU, 2MB E-cache, UPA64S, 66 M Hz PCI F u n c t io n a l D e s c r ip t io n The UltraSPARC™-IIi CPU Module ^ is a high performance, SPARC V9-compliant, small form-factor proces
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UPA64S,
64-bit
UPA64S)
UPA64S
SME2411BGA-66
W48C60
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