A1619A

Abstract: b1241
Contextual Info: SN54ABT32318, SN74ABT32318 18-BIT TRI-PORT UNIVERSAL BUS EXCHANGERS SCBS180A-JUNE 1 9 9 2 - REVISED JULY 1994 Members of the Texas Instruments Wldebus+ Family State-of-the-Art EPIC-IlB™ BICMOS Design Significantly Reduces Power Dissipation Typical V q l p Output Ground Bounce

1d4 cb

Contextual Info: SN54ABT16373A, SN74ABT16373A 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS S CB S160 - DE CE M B E R 1992 Members of the Texas Instruments Widebus Family SN54ABT16373A . . . WD PACKAGE SN74ABT16373A . . . DGG OR DL PACKAGE TOP VIEW State-of-the-Art EPIC-llB™ BiCMOS Design

Contextual Info: SN74LVC540 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch DB, DW, OR PW PACKAGE (TOP VIEW) • EPIC (Enhanced-Performance implanted CMOS) Submicron Process

Contextual Info: SN74LVC137 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH ADDRESS LATCHES SCAS340 - MARCH 1994 » EPIC Enhanced-Performance Implanted CMOS Submicron Process • Typical V o lp (Output Ground Bounce) D, DB, OR PW PACKAGE (TOP VIEW) A[ B[ c[ Ü2A [ S2B[ G1[

CO2V

Contextual Info: SN74ALVC16600 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW ÖEÄE [ LEAB [ A1 [ GND [ A2 [ A3 [ EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process

51A-2

Contextual Info: SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS S CBS085B - D3794, FEBR UARY 1991 - R EVISED JULY 1993 SN54ABT16470. . WD P ACKAG E SN74ABT16470. . DL P ACKAG E TOP VIEW Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-UB ™ BiCMOS Design

ABT16374A

Contextual Info: SN54ABT16374A, SN74ABT16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS MARCH 1993-R EV IS ED JULY 1993 Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-HB" BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per

Contextual Info: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS M ARCH 1993 OB, DW, OR PW PACKAGE TOP VIEW • Space-Saving Package Option: Shrink Small-Outline Package (DB) Features EIAJ 0.65-mm Lead Pitch • EPIC (Enhanced-Performance Implanted

Contextual Info: I SN74LVC158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS342 - MARCH 1994 D, DB, OR PW PACKAGE TOP VIEW EPIC (Enhanced-Performance Implanted CMOS) Submicron Process Typical V q l p (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C

SN54LV14

Abstract: 2020CN
Contextual Info: SN54LV14, SN74LV14 HEX SCHMITT-TRIGGER INVERTERS _ S C L S 1 8 7 B - FEBRUARY 1 9 9 3 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-|i Process SN54LV14 . . . J OR W PACKAGE SN74LV14. . . D, DB, OR PW PACKAGE (TOP VIEW) TVplcal V q l p (Output Ground Bounce)

Contextual Info: SN74LVC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET JANUARY 1993 D, DB, OR PW PACKAGE TOP VIEW • EPIC (Enhanced-Performance Implanted 1CCR [ 1 1D [ 2 CMOS) Submicron Process • 1CLK [ 3 Designed to Facilitate Incident Wave

Contextual Info: SN54LVU04, SN74LVU04 HEX INVERTERS S C L S 1 B 5 B - FEBRUARY 1993 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-n Process Typical V q l p (Output Ground Bounce) < 0.8 V at V c c . Ta = 25°C Typical V q h v (Output V q h Undershoot)

SN74LVC16544

Contextual Info: SN74LVC16544 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCAS351 - MARCH 1994 Member of the Texas Instruments Wldebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process DGG OR DL PACKAGE ftOP VIEW) 1ÜÊÂB[ 1 Typical V q l p (Output Ground Bounce)

SN74LVCC4245

Contextual Info: SN74LVCC4245 OCTAL BUS TRANSCEIVER WITH ADJUSTABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS _ SCAS584A - NOVEMBER 1696 - REVISED JANUARY 1997 EPICrM Enhanced-Performance Implanted CMOS Submicron Process DB, DW, OR PW PACKAGE

d3798

Abstract: ABT16543
Contextual Info: SN54ABT16543, SN74ABT16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS087A - D379B, FEBRUARY 1991 - R EVISED O CTO BER 1992 Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-llB™ BiCMOS Design Significantly Reduces Power Dissipation

Contextual Info: SN54AC74, SN74AC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET _SCASS21C- AUGUST 199S - REVISED SEPTEMBER 1996 EPIC Enhanced-Performance Implanted CMOS 1-|im Process SN54AC74 . . . J OR W PACKAGE SN74AC74 . . . D, DB, N, OR PW PACKAGE

Contextual Info: TICPAL18V8-30M, TICPAL18V8 25C ADVANCED EPICm CMOS GENERIC M i D 3 0 8 7 . DECEMBER 1 9 8 7 • 20-Pin Advanced C M OS Generic PAL •

D2957

Abstract: 1987-REVISEDAPRIL
Contextual Info: 54ACT11030,74ACT11030 8-INPUT POSITIVE-NAND GATES _ D2957. MARCH 1987-REVISEDAPRIL 1993 Inputs Are TTL*Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-PIn V^c and GNO Configurations Minimize High-Speed Switching Noise EPIC Enhanced-Perlormance Implanted

Contextual Info: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SC LS190P- FEBRUARY 19 9 3 - REVISED JULY 1996 EPIC Enhanced-Performance Implanted CMOS 2-fi Process Typical Vqlp (Output Ground Bounce) < 0.8 V at Vc c , Ta = 25°C SN54LV138. . . J OR W PACKAGE

A910D

Contextual Info: SN74LVC863 9-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS MARCH 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch • EPIC (Enhanced-Performance Implanted CMOS) Submicron Process • Designed to Facilitate Incident Wave

Contextual Info: SN74LVC16952 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCAS320 - NOVEMBER 1993 - REVISED MARCH 1994 Member of the Texas Instruments Wldebus Family DOG OR DL PACKAGE TOP VIEW EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process 10EA B L 1

SN74ACTOO

Contextual Info: SN54ACT00, SN74ACT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES S C A S 5 2 3 A -AU G U S T 199S - R E V IS E D MAY 1996 Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS 1-ixm Process Package Options Include Plastic Small-Outllne (D), Shrink Small-Outllne

Contextual Info: SN74LVC157 QUADRUPLE 2-LINE TO 1-UNE DATA SELECTOR/MULTIPLEXER SCAS292B-JANUARY 19 9 3 - REVISED JULY 1995 I • EPIC Enhanced-Performance Implanted CMOS Submicron Process • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model

Contextual Info: SN74LVC827 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS306B - MARCH 1993 - REVISED JULY 1996 • EPIC Enhanced-Performance Implanted CMOS Submicron Process db , dw , o r pw packaqe (t o p v ie w ) Typical Vqlp (Output Ground Bounce) < 0.8 V at Vcc = 3-3 V, TA = 25'C