EQUATOR VLIW ARCHITECTURE Search Results
EQUATOR VLIW ARCHITECTURE Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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MPC860DPCZQ50D4 |
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MPC860DP - PowerQUICC, 32 Bit Power Architecture SoC, 50MHz, -40 to 95C | |||
MPC860PCVR66D4 |
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MPC860P - PowerQUICC, 32 Bit Power Architecture SoC, 66MHz, -40 to 95C | |||
MPC860TCVR50D4 |
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MPC860T - PowerQUICC, 32 Bit Power Architecture, 50MHz, Communications Processor, -40 to 95C | |||
MPC860DEVR50D4 |
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MPC860DE - PowerQUICC, 32 Bit Power Architecture SoC, 50MHz, 0 to 95C | |||
MPC860ENZQ66D4 |
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MPC860EN - PowerQUICC, 32 Bit Power Architecture SoC, 66MHz, 0 to 95C |
EQUATOR VLIW ARCHITECTURE Datasheets Context Search
Catalog Datasheet | MFG & Type | Document Tags | |
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VLIW architecture
Abstract: coder bt.656 IEC958 MAP-1000 JBIG DECODER mpeg2 coder ANALOG DEVICES ASSEMBLY DATE CODE MAP1000A equator VLIW architecture Media process VLIW
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3d printer
Abstract: Equator Technologies equator VLIW architecture simulator encoder decoder MAP-CA IPTV STB VLIW VLIW architecture C2000 H263
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200Kunits 3d printer Equator Technologies equator VLIW architecture simulator encoder decoder MAP-CA IPTV STB VLIW VLIW architecture C2000 H263 | |
intrinsics
Abstract: VLIW architecture IEC958 ITU656 TMS320C80 vliw vector Equator Technologies MAP1000A
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VLIW architecture
Abstract: VLIW IEC958 ITU656 TMS320C80 Equator Technologies vliw vector i2c audio MAP-CA MAP-CA DSP
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mpeg decoder ics
Abstract: IEC958 ITU656 TMS320C80 vliw vector MAP-CA DSP equator VLIW architecture MAP-CA
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H.263 encoder chip
Abstract: GPDP IEC958 ITU656 TMS320C80 MAP1000A MAP-CA Equator Technologies
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NTSC Encoders
Abstract: equator VLIW architecture ac3 decoder toslink PAL to ITU-R BT.601/656 Decoder BGA352 CCIR656 IEC958 ITU656 RS-343A free home theater circuit diagram for assemble
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NTSC Encoders
Abstract: ds00008 equator VLIW architecture free home theater circuit diagram for assemble experiment for process control of sequential timer using 3 relay ac3 decoder toslink BT Type 47 Equivalent Relay MAP-CA NMOS sony data sheet PAL to ITU-R BT.601/656
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128-bit NTSC Encoders ds00008 equator VLIW architecture free home theater circuit diagram for assemble experiment for process control of sequential timer using 3 relay ac3 decoder toslink BT Type 47 Equivalent Relay MAP-CA NMOS sony data sheet PAL to ITU-R BT.601/656 | |
IEC968
Abstract: Equator BSP-15 sad transistor A11b BSP-15-400 DRGB 001 A ac3 decoder toslink PAL to ITU-R BT.601/656 Decoder BSP15 BSP-15 IEC958
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BSP-15 BSP15 128-bit IEC968 Equator BSP-15 sad transistor A11b BSP-15-400 DRGB 001 A ac3 decoder toslink PAL to ITU-R BT.601/656 Decoder IEC958 | |
Equator BSP-15
Abstract: itu 656 converter DRGB 001 A Equator Technologies stingray bsp15300 BSP-15 PAL to ITU-R BT.601/656 Decoder sad transistor A11b equator VLIW architecture
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BSP-15 BSP15 128-bit Equator BSP-15 itu 656 converter DRGB 001 A Equator Technologies stingray bsp15300 PAL to ITU-R BT.601/656 Decoder sad transistor A11b equator VLIW architecture | |
MAPCA2000
Abstract: X32B DSA00152780 hitachi PLC equator VLIW architecture ac3 decoder toslink PAL to ITU-R BT.601/656 Decoder TV Tuner phillips 21 IEC958 free home theater circuit diagram for assemble
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MAP-CA2000TM MAP-CA2000 MAP-CA2000 128-bit MAPCA2000 X32B DSA00152780 hitachi PLC equator VLIW architecture ac3 decoder toslink PAL to ITU-R BT.601/656 Decoder TV Tuner phillips 21 IEC958 free home theater circuit diagram for assemble | |
saf7730
Abstract: saf7730 audio wind energy simulink matlab turbo codes matlab simulation program Philips SAF7730 64 point FFT radix-4 VHDL documentation CW4512 DMC550 SP1403 saf77
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verilog code for 32 BIT ALU implementation
Abstract: vhdl code 16 bit processor verilog code 16 bit processor verilog code for barrel shifter vhdl code for 8 bit barrel shifter 16 bit multiplier VERILOG Architecture of TMS320C4X FLOATING POINT PROCESSOR instruction set of TMS320C5x dsp processor Architecture of TMS320C54X addressing modes in adsp-21xx
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X3J16/95-0029 NM6403 verilog code for 32 BIT ALU implementation vhdl code 16 bit processor verilog code 16 bit processor verilog code for barrel shifter vhdl code for 8 bit barrel shifter 16 bit multiplier VERILOG Architecture of TMS320C4X FLOATING POINT PROCESSOR instruction set of TMS320C5x dsp processor Architecture of TMS320C54X addressing modes in adsp-21xx | |
GSM 900 simulink matlab
Abstract: ORELA 4500 voice recognition matlab simulink ZSPneo verilog code for speech recognition Ceva-XS1100 TMS320C5507 PNX5220 CW5521 Xtensa
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TMS320C64x GSM 900 simulink matlab ORELA 4500 voice recognition matlab simulink ZSPneo verilog code for speech recognition Ceva-XS1100 TMS320C5507 PNX5220 CW5521 Xtensa | |
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ADSP-215xx
Abstract: TMS320DA250 addressing modes of adsp 21xx processors vhdl code for systolic iir filter TMS320DRE200 tms320f2812 addressing modes adsp215xx TMS320C4X ARCHITECTURE, ADDRESSING MODES TMS320DSC21 verilog code for speech recognition
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32-bit, 24-bit, 16-bit, LMS24 LMS16 ADSP-215xx TMS320DA250 addressing modes of adsp 21xx processors vhdl code for systolic iir filter TMS320DRE200 tms320f2812 addressing modes adsp215xx TMS320C4X ARCHITECTURE, ADDRESSING MODES TMS320DSC21 verilog code for speech recognition | |
ORELA 4500
Abstract: ARC 625D PNX5 CW4512 PNX5220 ZSP540 interface of IR SENSOR with SPARTAN3 FPGA ARC 725D TMS320LF24xx digital hearing aids
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18x18-bit 10-bit, 40-MHz PowerPC405 32-bit ORELA 4500 ARC 625D PNX5 CW4512 PNX5220 ZSP540 interface of IR SENSOR with SPARTAN3 FPGA ARC 725D TMS320LF24xx digital hearing aids | |
BCM35421
Abstract: tm3270 ET6300 MAP-CA parallel to serial conversion in C IEEE paper image enhancement verilog code crunch arbiter decoder -1996 bcm35 RISC semaphore
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